WM8740SEDS/V Wolfson Microelectronics, WM8740SEDS/V Datasheet - Page 13
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WM8740SEDS/V
Manufacturer Part Number
WM8740SEDS/V
Description
Audio D/A Converter ICs Stereo DAC High End
Manufacturer
Wolfson Microelectronics
Datasheet
1.WM8740SEDSV.pdf
(27 pages)
Specifications of WM8740SEDS/V
Resolution
24 bit
Operating Supply Voltage
5 V
Operating Temperature Range
- 40 C to + 85 C
Mounting Style
SMD/SMT
Number Of Dac Outputs
4
Number Of Dacs
2
Snr
116 dB
Supply Current
19 mA
Thd Plus Noise
- 104 dB
Package / Case
SSOP-28
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
WM8740
NORMAL SAMPLE RATE
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In normal mode, the data is input serially on one pin for both left and right channels.
Data can be “right justified” meaning that the last 16, 20 or 24 bits (depending on chosen PCM word
length) that were clocked in prior to the transition on LRCIN are valid.
Alternatively data can be “left justified” (20 and 24-bit PCM data only), where the bits are clocked in
as the first 20 or 24 bits after a transition on LRCIN.
For the three I
except with one additional preceding clock cycle.
Figure 8 Audio Data Input Format
BCKIN (PIN 3)
BCKIN (PIN 3)
LRCIN (PIN 1)
LRCIN (PIN 1)
16-BIT RIGHT
20-BIT RIGHT
24-BIT RIGHT
24-BIT LEFT
20-BIT LEFT
DIN (PIN 2)
DIN (PIN 2)
DIN (PIN 2)
DIN (PIN 2)
DIN (PIN 2)
DIN (PIN 2)
DIN (PIN 2)
DIN (PIN 2)
JUSTIFIED
JUSTIFIED
JUSTIFIED
JUSTIFIED
JUSTIFIED
16-BIT I
24-BIT I
20-BIT I
2
2
2
2
S
S
S
S modes supported (16-bit, 20-bit and 24-bit PCM data), data is clocked “left justified”
B2
B0
B0
B2 B1 B0
B2 B1
B1 B0
B0
B23 B22 B21
B19 B18 B17
B15
B23
B19
B23 B22 B21 B20 B19
B2
B6
B2
B19 B18 B17
B4 B3 B2 B1 B0
B0
B1 B0
B5 B4
B1 B0
LEFT
LEFT
B15
B3 B2 B1
B2 B1 B0
B2 B1 B0
B2 B1 B0
B0
1/fs
B23 B22 B21
B19 B18 B17
B15
B23
B19
B23 B22 B21 B20 B19
B2 B1 B0
B6 B5 B4
B2 B1 B0
B19 B18 B17
B4 B3 B2 B1 B0
B0
RIGHT
RIGHT
B15
B3 B2 B1
PD, Rev 4.4, April 2010
B2 B1 B0
B2 B1 B0
B2 B1 B0
B0
Production Data
B15
B23
B19
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