ZMOT0BSB0A0BG Zilog, ZMOT0BSB0A0BG Datasheet - Page 27

• Manufacturer Part Number: ZMOT0BSB0A0BG
• Description: Microcontrollers (MCU) ZMB N. SDA02-54-P Py Fr AA 0.9 GI T1 Lens
• Manufacturer: Zilog

Specifications of ZMOT0BSB0A0BG

• Processor Series: ZMOTION
• Core: Z8FS040
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Program Memory Type: Flash
• Program Memory Size: 4 KB
• Package / Case: SOIC-8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PS028510-0111
API Register Name
PIR Engine Enable Register (ePIR_Enable)
PIR Sensitivity Register (ePIR_Sensitivity)
PIR Status/Control Register 0 (ePIR_SC0)
PIR Status/Control Register 1 (ePIR_SC1)
PIR Status/Control Register 2 (ePIR_SC2)
PIR Status/Control Register 3 (ePIR_SC3) -
28 Pin SSOP
Standard API Register Set
CPU Cycles: 261
Peripherals Initialized:
ADC and GPIO depending on API selected options. ADC IRQ set for
medium priority.
EPIR_ADC_ISR Macro.
tion handles the ADC interrupt and executes this macro. All motion detection processing
is performed by this macro.
EPIR_ADC_ISR Macro:
PUSHX
LDX
CALL
POPX
The CPU cycles used by the
configuration.
PIR Engine CPU Stack Usage
The PIR engine shares the processor stack with the user application. There are no special
requirements on the placement of the stack in memory, but it is essential that the user pro-
vide enough stack space for both the user application and the PIR engine.
The PIR engine requires a maximum 6 bytes of stack.
The Standard API Register Set is a series of registers implemented in the Z8FS040 RAM
that allows the user code to configure and communicate with the PIR engine. The default
values are loaded only when the PIR engine is enabled via the PIR Enable Register.
Table 5. PIR Engine Standard API Registers
This macro is executed for each ADC conversion. The applica-
EPIR_ADC_ISR
Address
100h
101h
102h
103h
104h
105h
RP
RP, #%E0
%1000
RP
ZMOTION™ Detection and Control Family
Mnemonic
ePIR_Enable
ePIR_Sensitivity
ePIR_SC0
ePIR_SC1
ePIR_SC2
ePIR_SC3
macro vary depending on Engine state and
Description
Enable PIR Engine
Motion Sensitivity
Motion Status and Engine
Mode Control
Engine Status and Control
Range Control
ADC Scan Request
Product Specification
Standard API Register Set
20