CAT825ZSDI-GT3 ON Semiconductor, CAT825ZSDI-GT3 Datasheet - Page 8
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CAT825ZSDI-GT3
Manufacturer Part Number
CAT825ZSDI-GT3
Description
Supervisory Circuits SUP ACT LOW ACT HI MR
Manufacturer
ON Semiconductor
Datasheet
1.CAT823TTDI-GT3.pdf
(15 pages)
Specifications of CAT825ZSDI-GT3
Chip Enable Signals
No
Minimum Operating Temperature
- 40 C
Number Of Voltages Monitored
1
Overvoltage Threshold
2.32 V
Manual Reset
Resettable
Watchdog
No
Battery Backup Switching
No
Power-up Reset Delay (typ)
20 us
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.2 V
Supply Current (typ)
3 uA
Maximum Power Dissipation
247 mW
Mounting Style
SMD/SMT
Maximum Operating Temperature
+ 85 C
Package / Case
SC-70-5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
CAT823, CAT824, CAT825
WATCHDOG TIMER
The CAT823 and CAT824 provide a Watchdog input
(WDI). The watchdog timer function forces RESET
(and RESET in the CAT824) signals active when the
WDI input does not have a transition from low-to-high
or high-to-low within 1.12 seconds. Timeout of the
watchdog starts when RESET
CAT824) becomes inactive. If a transition occurs on
the WDI input pin prior to the watchdog time-out, the
watchdog timer is reset and begins to time-out again.
If the watchdog timer is allowed to time-out, then the
reset output(s) will go active for t
will repeat the watchdog timeout process.
Figure 3 below shows a typical implementation of a
watchdog function. Any processor signal that repeats
dependant on the normal operation of the processor
or directed by the software operating on the processor
Figure 3. Watchdog Timer
Figure 4. Watchdog Disable Circuit
Doc. No. MD-3027 Rev. D
Voltage
Supply
WDI
V
CC
RESET
GND
¯¯¯¯¯¯ (RESET on the
MR
CAT823
RP
and once released
CAT823
MR
GND
RESET
V
WDI
¯¯¯¯¯¯
CC
V
CC
8
150kΩ
110kΩ
can be used to strobe the watchdog input. The most
reliable is a dedicated I/O output transitioned by a
specific software instruction.
The watchdog can be disabled by floating (or tri-
stating) the WDI input (see Figure 4). If the watchdog
is disabled the WDI pin will be pulled low for the first
7/8
the last 1/8
of the WDI input and then high is used to detect an
open or tri-state condition and will continue to repeat
until the WDI input is driven high or low.
For most efficient operation of devices with the
watchdog function the WDI input should be held low
the majority of the time and only strobed high as
required to reset the watchdog timer.
th
MCLR
’s of the watchdog period (t
Tristate
PIC
µC
th
of the watchdog period. This pulling low
ADDRESS
OUTPUT
µC
Characteristics subject to change without notice
DECODER
WD
© 2010 SCILLC. All rights reserved.
) and pulled high for