LCMXO640C-3TN100C Lattice, LCMXO640C-3TN100C Datasheet - Page 5

• Manufacturer Part Number: LCMXO640C-3TN100C
• Description: CPLD - Complex Programmable Logic Devices 640 LUTS 74 I/O
• Manufacturer: Lattice
• Series: MachXOr

Specifications of LCMXO640C-3TN100C

• Memory Type: SRAM
• Number Of Macrocells: 320
• Delay Time: 4.9 ns
• Number Of Programmable I/os: 74
• Operating Supply Voltage: 1.8 V, 2.5 V, 3.3 V
• Supply Current: 17 mA
• Maximum Operating Temperature: + 90 C
• Minimum Operating Temperature: 0 C
• Package / Case: TQFP-100
• Mounting Style: SMD/SMT
• Supply Voltage (max): 3.465 V
• Supply Voltage (min): 1.71 V
• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 4.9ns
• Voltage Supply - Internal: 1.71 V ~ 3.465 V
• Number Of Logic Elements/blocks: -
• Number Of Gates: -
• Number Of I /o: 74
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Figure 2-1. Top View of the MachXO1200 Device
1. Top view of the MachXO2280 device is similar but with higher LUT count, two PLLs, and three EBR blocks.
Figure 2-2. Top View of the MachXO640 Device
sysMEM Embedded
Block RAM (EBR)
sysCLOCK
PLL
JTAG Port
Programmable
Function Units
with RAM (PFUs)
JTAG Port
PIOs Arranged into
sysIO Banks
1
2-2
Programmable
Function Units
without RAM (PFFs)
MachXO Family Data Sheet
PIOs Arranged into
sysIO Banks
Programmable
Functional Units
without RAM (PFFs)
Programmable
Functional Units
with RAM (PFUs)
Architecture