LC4064V-25TN100C Lattice, LC4064V-25TN100C Datasheet - Page 39

• Manufacturer Part Number: LC4064V-25TN100C
• Description: CPLD - Complex Programmable Logic Devices PROGRAMMABLE SUPER FAST HI DENSITY PLD
• Manufacturer: Lattice

Specifications of LC4064V-25TN100C

• Memory Type: EEPROM
• Number Of Macrocells: 64
• Number Of Product Terms Per Macro: 80
• Maximum Operating Frequency: 400 MHz
• Delay Time: 2.5 ns
• Number Of Programmable I/os: 272
• Operating Supply Voltage: 3.3 V
• Supply Current: 12 mA
• Maximum Operating Temperature: + 90 C
• Minimum Operating Temperature: 0 C
• Package / Case: TQFP-100
• Mounting Style: SMD/SMT
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Boundary Scan Waveforms and Timing Specifications
t
t
t
t
t
t
t
t
t
t
t
t
t
t
BTCP
BTCH
BTCL
BTSU
BTH
BRF
BTCO
BTOZ
BTVO
BTCPSU
BTCPH
BTUCO
BTUOZ
BTUOV
Symbol
TCK [BSCAN test] clock cycle
TCK [BSCAN test] pulse width high
TCK [BSCAN test] pulse width low
TCK [BSCAN test] setup time
TCK [BSCAN test] hold time
TCK [BSCAN test] rise and fall time
TAP controller falling edge of clock to valid output
TAP controller falling edge of clock to data output disable
TAP controller falling edge of clock to data output enable
BSCAN test Capture register setup time
BSCAN test Capture register hold time
BSCAN test Update reg, falling edge of clock to valid output
BSCAN test Update reg, falling edge of clock to output disable
BSCAN test Update reg, falling edge of clock to output enable
Parameter
39
ispMACH 4000V/B/C/Z Family Data Sheet
Min.
40
20
20
10
50
10
—
—
—
—
—
—
8
8
Max.
10
10
10
25
25
25
—
—
—
—
—
—
—
—
mV/ns
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns