LCMXO1200C-3FTN256I Lattice, LCMXO1200C-3FTN256I Datasheet - Page 26

• Manufacturer Part Number: LCMXO1200C-3FTN256I
• Description: CPLD - Complex Programmable Logic Devices 1200 LUTs 211 IO 1.8 /2.5/3.3V -3 Spd I
• Manufacturer: Lattice

Specifications of LCMXO1200C-3FTN256I

• Memory Type: SRAM
• Number Of Macrocells: 600
• Maximum Operating Frequency: 500 MHz
• Delay Time: 5.1 ns
• Number Of Programmable I/os: 211
• Operating Supply Voltage: 1.8 V, 2.5 V, 3.3 V
• Supply Current: 21 mA
• Maximum Operating Temperature: + 100 C
• Minimum Operating Temperature: - 40 C
• Package / Case: FTBGA-256
• Mounting Style: SMD/SMT
• Supply Voltage (max): 3.465 V
• Supply Voltage (min): 1.71 V
• Programmable Type: *
• Voltage - Input: *
• Speed: *
• Mounting Type: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Figure 2-22. MachXO Configuration and Programming
Density Shifting
The MachXO family has been designed to enable density migration in the same package. Furthermore, the archi-
tecture ensures a high success rate when performing design migration from lower density parts to higher density
parts. In many cases, it is also possible to shift a lower utilization design targeted for a high-density device to a
lower density device. However, the exact details of the final resource utilization will impact the likely success in
each case.
Port
Mode
Program in seconds
Memory Space
Non-Volatile
Background
ISP 1149.1 TAP Port
microseconds
Download in
Power-up
Refresh
2-23
SRAM Memory
Space
1532
MachXO Family Data Sheet
Configure in milliseconds
Architecture