AGLP125V5-CSG289 Actel, AGLP125V5-CSG289 Datasheet - Page 88
AGLP125V5-CSG289
Manufacturer Part Number
AGLP125V5-CSG289
Description
FPGA - Field Programmable Gate Array 125K System Gates
Manufacturer
Actel
Datasheet
1.AGLP125V5-CSG289.pdf
(128 pages)
Specifications of AGLP125V5-CSG289
Processor Series
AGLP125
Core
IP Core
Number Of Macrocells
1024
Maximum Operating Frequency
250 MHz
Number Of Programmable I/os
4
Data Ram Size
4608 bit
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
AGLP-Eval-Kit, AGL-Dev-Kit-SCS, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, Flashpro 4, Flashpro 3, Flashpro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
125 K
Package / Case
CSP-289
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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IGLOO PLUS DC and Switching Characteristics
Figure 2-33 • FIFO FULL Flag and AFULL Flag Assertion
Figure 2-34 • FIFO EMPTY Flag and AEMPTY Flag Deassertion
Figure 2-35 • FIFO FULL Flag and AFULL Flag Deassertion
2- 74
(Address Counter)
(Address Counter)
(Address Counter)
AEMPTY
WA/RA
WCLK
FULL
AFULL
WA/RA
EMPTY
WCLK
RCLK
WA/RA
RCLK
AFULL
WCLK
FULL
MATCH (FULL)
MATCH
(EMPTY)
NO MATCH
1st Rising
After 1st
Write
Edge
1st Rising
After 1st
Read
Edge
NO MATCH
NO MATCH
t
NO MATCH
2nd Rising
CYC
After 1st
Write
Edge
1st Rising
NO MATCH
After 2nd
Read
Edge
NO MATCH
t
R ev i sio n 1 1
RCKEF
t
WCKF
t
CKAF
NO MATCH
NO MATCH
Dist = AFF_TH
NO MATCH
NO MATCH
t
WCKFF
t
CKAF
MATCH (FULL)
t
CKAF
Dist = AEF_TH + 1
Dist = AFF_TH – 1
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