LFE2-12SE-6FN256C Lattice, LFE2-12SE-6FN256C Datasheet - Page 359
LFE2-12SE-6FN256C
Manufacturer Part Number
LFE2-12SE-6FN256C
Description
FPGA - Field Programmable Gate Array 12K LUTs S-Series 1.1.2V -6 Spd
Manufacturer
Lattice
Datasheet
1.LFE2-12SE-6FN256C.pdf
(389 pages)
Specifications of LFE2-12SE-6FN256C
Number Of Macrocells
12000
Maximum Operating Frequency
320 MHz
Number Of Programmable I/os
193
Data Ram Size
226304
Delay Time
12 ns
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Package / Case
FPBGA-256
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFE2-12SE-6FN256C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Company:
Part Number:
LFE2-12SE-6FN256C-5I
Manufacturer:
TI
Quantity:
160
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LFE2M70E/SE and LFE2M100E/SE Logic Signal Connections: 1152 fpBGA
Lattice Semiconductor
* Supports true LVDS. Other differential signals must be emulated with external resistors.
** These dedicated input pins can be used for GPLLs or GDLLs within the respective quadrant.
*** For density migration, board design must take into account that these sysCONFIG pins are dual function for the lower density devices
****Due to packaging bond out option, this DQS does not have all the necessary DQ pins bonded out for a full 8-bit data width.
Note: VCCIO and GND pads are used to determine the average DC current drawn by I/Os between GND/VCCIO connections, or between the
last GND/VCCIO in an I/O bank and the end of an I/O bank. The substrate pads listed in the Pin Table do not necessarily have a one to one
connection with a package ball or pin.
Number
M11
M24
M25
W11
Ball
K10
K11
K12
K13
K23
K24
K25
K26
N10
N11
P10
P25
P26
U11
Y10
Y11
R15
R20
Y15
Y20
L11
L12
L13
L14
L21
L22
L23
L24
L25
L26
T11
M6
M8
R9
J9
(ECP2M20 and ECP2M35). They can be either sysCONFIG pins or general purpose I/Os. These pins are dedicated pins for the higher den-
sity devices (ECP2M50, ECP2M70, and ECP2M100).
Function
Ball/Pad
VCCPLL
VCCPLL
VCCPLL
VCCPLL
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
LFE2M70E/SE
Bank
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Dual Function
Differential
4-256
Function
Ball/Pad
VCCPLL
VCCPLL
VCCPLL
VCCPLL
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
LatticeECP2/M Family Data Sheet
LFE2M100E/SE
Bank
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Dual Function
Pinout Information
Differential
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