AGLP030V5-CSG201 Actel, AGLP030V5-CSG201 Datasheet - Page 37
AGLP030V5-CSG201
Manufacturer Part Number
AGLP030V5-CSG201
Description
FPGA - Field Programmable Gate Array 30K System Gates
Manufacturer
Actel
Datasheet
1.AGLP125V5-CSG289.pdf
(128 pages)
Specifications of AGLP030V5-CSG201
Processor Series
AGLP030
Core
IP Core
Number Of Macrocells
256
Maximum Operating Frequency
250 MHz
Number Of Programmable I/os
4
Data Ram Size
4608 bit
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
AGLP-Eval-Kit, AGL-Dev-Kit-SCS, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, Flashpro 4, Flashpro 3, Flashpro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
30 K
Package / Case
CSP-201
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Table 2-26 • Summary of I/O Timing Characteristics—Software Default Settings, STD Speed Grade
3.3 V LVTTL /
3.3 V LVCMOS
3.3 V LVCMOS
Wide Range
2.5 V LVCMOS
1.8 V LVCMOS
1.5 V LVCMOS
1.2 V LVCMOS
1.2 V LVCMOS
Wide Range
Notes:
1. The minimum drive strength for any LVCMOS 3.3 V software configuration when run in wide range is ±100 µA. Drive
2. All LVCMOS 3.3 V software macros support LVCMOS 3.3 V wide range as specified in the JESD-8B specification.
3. All LVCMOS 1.2 V software macros support LVCMOS 1.2 V wide range as specified in the JESD8-12 specification.
4. For specific junction temperature and voltage supply levels, refer to
strength displayed in the software is supported for normal range only. For a detailed I/V curve, refer to the IBIS models.
Commercial-Case Conditions: T
2
3
100 µA 12 mA High 5 pF
100 µA 2 mA High 5 pF
12 mA 12 mA High 5 pF
12 mA 12 mA High 5 pF
8 mA 8 mA High 5 pF
4 mA 4 mA High 5 pF
2 mA 2 mA High 5 pF
–
J
– 0.98 2.31 0.19 0.99 1.37 0.67 2.34 1.86 2.65 3.38 ns
– 0.98 3.21 0.19 1.32 1.92 0.67 3.21 2.52 3.73 4.73 ns
– 0.98 2.29 0.19 1.19 1.40 0.67 2.32 1.94 2.65 3.27 ns
– 0.98 2.45 0.19 1.12 1.61 0.67 2.48 2.16 2.71 3.16 ns
– 0.98 2.71 0.19 1.26 1.80 0.67 2.75 2.39 2.78 3.15 ns
– 0.98 3.38 0.19 1.57 2.34 0.67 3.26 2.78 2.99 3.24 ns
= 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 3.0 V
0.98 3.38 0.19 1.57 2.34 0.67 3.26 2.78 2.99 3.24 ns
R ev i si o n 1 1
Table 2-6 on page 2-6
IGLOO PLUS Low Power Flash FPGAs
for derating values.
2- 23
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