AGL400V2-CSG196 Actel, AGL400V2-CSG196 Datasheet - Page 69
AGL400V2-CSG196
Manufacturer Part Number
AGL400V2-CSG196
Description
FPGA - Field Programmable Gate Array 400K System Gates
Manufacturer
Actel
Datasheet
1.AGL030V2-CSG81.pdf
(236 pages)
Specifications of AGL400V2-CSG196
Processor Series
AGL400
Core
IP Core
Maximum Operating Frequency
250 MHz
Number Of Programmable I/os
143
Data Ram Size
54 Kbit
Supply Voltage (max)
1.5 V
Supply Current
27 uA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
AGL-Icicle-Kit, AGL-Dev-Kit-SCS, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.2 V
Number Of Gates
400 K
Package / Case
CSP-196
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Table 2-76 •
Table 2-77 •
Drive
Strength
100 µA
100 µA
100 µA
100 µA
Notes:
1. Note that 3.3 V LVCMOS wide range is applicable to 100 µA drive strength only. The configuration will not operate at the
2. For specific junction temperature and voltage supply levels, refer to
Drive
Strength
100 µA
100 µA
100 µA
100 µA
Notes:
1. Note that 3.3 V LVCMOS wide range is applicable to 100 µA drive strength only. The configuration will not operate at the
2. For specific junction temperature and voltage supply levels, refer to
3. Software default selection highlighted in gray.
equivalent software default drive strength. These values are for normal ranges only.
equivalent software default drive strength. These values are for normal ranges only.
Equivalent
Equivalent
Software
Software
Strength
Strength
Commercial-Case Conditions: T
Applicable to Standard Banks
Commercial-Case Conditions: T
Applicable to Standard Banks
Option
Option
3.3 V LVCMOS Wide Range Low Slew – Applies to 1.2 V DC Core Voltage
Default
3.3 V LVCMOS Wide Range High Slew – Applies to 1.2 V DC Core Voltage
Default
Drive
Drive
2 mA
4 mA
6 mA
8 mA
2 mA
4 mA
6 mA
8 mA
1
1
Grade
Grade
Speed
Speed
Std.
Std.
Std.
Std.
Std.
Std.
Std.
Std.
t
t
DOUT
1.55
1.55
1.55
1.55
DOUT
1.55
1.55
1.55
1.55
6.44
6.44
5.41
5.41
3.89
3.89
3.33
3.33
t
t
DP
DP
J
J
= 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 2.7
= 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 2.7
0.26
0.26
0.26
0.26
t
0.26
0.26
0.26
0.26
t
DIN
DIN
R ev i si o n 1 8
1.29
1.29
1.29
1.29
1.29
1.29
1.29
1.29
t
t
PY
PY
Table 2-6 on page 2-7
Table 2-6 on page 2-7
t
t
EOUT
1.10
1.10
1.10
1.10
1.10
1.10
1.10
1.10
EOUT
6.44
6.44
5.41
5.41
3.89
3.89
3.33
3.33
t
t
ZL
ZL
5.64
5.64
4.91
4.91
3.13
3.13
2.62
2.62
t
t
ZH
ZH
IGLOO Low Power Flash FPGAs
for derating values.
for derating values.
2.99
2.99
3.35
3.35
2.99
2.99
3.34
3.34
t
t
LZ
LZ
3.28
3.28
3.89
3.89
3.45
3.45
4.07
4.07
t
t
HZ
HZ
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
2- 55
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