APA300-PQ208I Actel, APA300-PQ208I Datasheet - Page 36
APA300-PQ208I
Manufacturer Part Number
APA300-PQ208I
Description
FPGA - Field Programmable Gate Array 300K System Gates
Manufacturer
Actel
Datasheet
1.APA075-FGG144.pdf
(178 pages)
Specifications of APA300-PQ208I
Processor Series
APA300
Core
IP Core
Maximum Operating Frequency
5 MHz
Number Of Programmable I/os
158
Data Ram Size
73728
Supply Voltage (max)
2.7 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Development Tools By Supplier
APA-Eval-Kit, APA-Eval-BRD1, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, Flashpro 4, Flashpro 3, Flashpro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
2.3 V
Number Of Gates
300 K
Package / Case
PQFP-208
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
APA300-PQ208I
Manufacturer:
XILINX
Quantity:
1 200
Part Number:
APA300-PQ208I
Manufacturer:
ACTEL/爱特
Quantity:
20 000
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Related Documents
Application Notes
Efficient Use of ProASIC Clock Trees
http://www.actel.com/documents/A500K_Clocktree_AN.pdf
I/O Features in ProASIC
http://www.actel.com/documents/APA_LVPECL_AN.pdf
Power-Up Behavior of ProASIC
http://www.actel.com/documents/APA_PowerUp_AN.pdf
ProASIC
http://www.actel.com/documents/APA_PLLdynamic_AN.pdf
Using ProASIC
http://www.actel.com/documents/APA_PLL_AN.pdf
In-System Programming ProASIC
http://www.actel.com/documents/APA_External_ISP_AN.pdf
Performing Internal In-System Programming Using Actel’s ProASIC
http://www.actel.com/documents/APA_Microprocessor_AN.pdf
ProASIC
http://www.actel.com/documents/APA_RAM_FIFO_AN.pdf
White Paper
Design Security in Nonvolatile Flash and Antifuse FPGAs
http://www.actel.com/documents/DesignSecurity_WP.pdf
User’s Guides
Designer User’s Guide
http://www.actel.com/documents/designer_UG.pdf
SmartGen Cores Reference Guide
http://www.actel.com/documents/gen_refguide_ug.pdf
ProASIC and ProASIC
http://www.actel.com/documents/pa_libguide_UG.pdf
Additional Information
The following link contains additional information on ProASIC
http://www.actel.com/products/proasicplus/default.aspx
2 -2 6
ProASIC
PLUS
PLUS
PLUS
PLL Dynamic Reconfiguration Using JTAG
RAM and FIFO Blocks
PLUS
Flash Family FPGAs
Clock Conditioning Circuits
PLUS
PLUS
Macro Library Guide
Flash FPGAs
PLUS
PLUS
Devices
Devices
v5.9
PLUS
PLUS
devices.
Devices
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