A54SX32A-TQG100 Actel, A54SX32A-TQG100 Datasheet - Page 32

• Manufacturer Part Number: A54SX32A-TQG100
• Description: FPGA - Field Programmable Gate Array 48K System Gates
• Manufacturer: Actel

Specifications of A54SX32A-TQG100

• Processor Series: A54SX32
• Core: IP Core
• Number Of Macrocells: 1800
• Maximum Operating Frequency: 350 MHz
• Number Of Programmable I/os: 249
• Delay Time: 4 ns to 8.4 ns
• Supply Voltage (max): 5.25 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
• Mounting Style: SMD/SMT
• Supply Voltage (min): 2.25 V
• Number Of Gates: 32 K
• Package / Case: TQFP-100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Theta-JA
Junction-to-ambient thermal resistance (
has little relevance in actual performance of the product in real application. It should be employed with caution but is
useful for comparing the thermal performance of one package to another.
A sample calculation to estimate the absolute maximum power dissipation allowed (worst case) for a 329-pin PBGA
package at still air is as follows. i.e.:
The device's power consumption must be lower than the calculated maximum power dissipation by the package.
The power consumption of a device can be calculated using the Actel power calculator. If the power consumption is
higher than the device's maximum allowable power dissipation, then a heat sink can be attached on top of the case or
the airflow inside the system must be increased.
Theta-JC
Junction-to-case thermal resistance (
to the top or bottom surface of the package. It is applicable for packages used with external heat sinks and only
applies to situations where all or nearly all of the heat is dissipated through the surface in consideration. If the power
consumption is higher than the calculated maximum power dissipation of the package, then a heat sink is required.
Calculation for Heat Sink
For example, in a design implemented in a FG484 package, the power consumption value using the power calculator is
3.00 W. The user-dependent data T
From the datasheet:
The 2.22 W power is less than then required 3.00 W; therefore, the design requires a heat sink or the airflow where the
device is mounted should be increased. The design's junction-to-air thermal resistance requirement can be estimated
by:
2 -1 2
SX-A Family FPGAs
θ
T
T
T
θ
θ
JA
A
A
JA
JC
J
=
=
=
=
= 17.1°C/W is taken from
= 125°C is the maximum limit of ambient (from the datasheet)
110°C
70°C
18.0°C/W
3.2 °C/W
Max. Allowed Power
θ
JA
P
=
=
Max Junction Temp Max. Ambient Temp
----------------------------------------------------------------------------------------------------------- -
Max Junction Temp Max. Ambient Temp
----------------------------------------------------------------------------------------------------------- -
=
J
Table 2-12 on page 2-11
and T
θ
Max Junction Temp Max. Ambient Temp
----------------------------------------------------------------------------------------------------------- -
JC
) measures the ability of a device to dissipate heat from the surface of the chip
θ
A
JA
–
are given as follows:
) is determined under standard conditions specified by JESD-51 series but
P
θ
–
JA
θ
–
JA
v5.3
=
=
110°C 70°C
------------------------------------
110°C 70°C
------------------------------------
18.0°C/W
3.00 W
–
–
=
150°C 125°C
--------------------------------------- -
17.1°C/W
=
=
13.33°C/W
2.22 W
–
=
1.46 W
EQ 2-11
EQ 2-12
EQ 2-13