IDT3CP0C02-16NSGE IDT, Integrated Device Technology Inc, IDT3CP0C02-16NSGE Datasheet - Page 4

IC OSC PROGRAMMABLE TIMER 16MHZ

IDT3CP0C02-16NSGE

Manufacturer Part Number
IDT3CP0C02-16NSGE
Description
IC OSC PROGRAMMABLE TIMER 16MHZ
Manufacturer
IDT, Integrated Device Technology Inc
Type
Programmable Timerr

Specifications of IDT3CP0C02-16NSGE

Current - Supply
2.5mA
Mounting Type
Surface Mount
Frequency
16MHz
Voltage - Supply
1.62 V ~ 3.6 V
Operating Temperature
-20°C ~ 70°C
Package / Case
4-VDFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Count
-
Lead Free Status / Rohs Status
Compliant
3C02 Preliminary Data Sheet
3C02 REVISION B DATE, 10/20/2010
Electrical Characteristics
VDD=2.25V to 2.75V, T
Notes 1. Measured with a 50Ω to GND termination
2: Measured at 48MHz output frequency
3. The 3C02 will support continuous VDD operation from 1.62 to 3.6V. The device can be powered up with a supply voltage at any of the 3 main supply rails of 1.8V, 2.5V or 3.3V.
4. Measured over 1000 cycles per JEDEC standard 65
5. Electrical parameters are guaranteed by design and characterization over the specified ambient operating temperature range, which is established when the device is mounted in a
test socket with maintained transverse airflow greater than 500lfpm. The device will meet specifications after thermal equilibrium has been reached under these conditions.
ElectroStaticDischa
Frequency Stability
Quiescent Current
Output HIGH level
Output Frequency
Output LOW level
Cycle-cycle Jitter
Input HIGH level
Input LOW level
Supply Voltage
Supply Current
Power-up time
Phase Noise
Period Jitter
Parameter
Duty Cycle
Rise Time
Fall Time
rge
A
=-20 to 70
Symbol
PJ
IDDQ
F
F
ESD
VDD
V
IDD
V
V
V
RT
DC
PN
o
FT
t
CJ
OUT
TOT
on
RMS
OH
C unless otherwise noted. Typical values are measured at VDD=2.5V, T
OL
IL
IH
variation,aging (1st year at 35oC),shock&vibration. “E” device
Factory Programmable.Contact IDT for frequencies not listed
Clock output duty cycle. Measured under 100MHz at VDD/2,
Clock output duty cycle. Measured over 100MHz at VDD/2,
Output valid time after VDD meets the specified range&CE
Active supply current, VDD=2.5V, T=35oC, no output load
The absolute value of max change in the periods of any 2
20% to 80% x VDD. Output load (C
80% to 20% x VDD. Output load (C
Total Frequency Stability over temperature,supply
Human Body Model, tested per JESD D22-A114
Total RMS Period Jitter (including random and
5
[2.5V]
option, over -20 to 70
1MHz offset from carrier
CE=LOW, output disabled
adjacent cycles
Normal Operation
deterministic)
Conditions
I
I
OH
OL
transition
C
C
CE pin
CE pin
L
L
= -3mA
= 3mA
=7pF
=7pF
1,2
1,2,4
o
C range
L
L
4
3
) =7pF, NSG-option
) =7pF, NSG-option
1,2
A
=35
o
C
VDD*0.7
VDD-0.4
4000
2.25
Min
-0.3
45
40
50
12,48,75,125
©2010 Integrated Device Technology, Inc.
2.25
-140
Typ
100
2.5
0.2
3.5
VDD+0.3
VDD*0.3
+100
Max
2.75
2.75
-135
400
0.4
2.3
2.3
55
60
50
1
CMOS OSCILLATOR
dBc/Hz
ps
Units
MHz
ppm
mA
µA
ns
ns
µs
ps
%
%
V
V
V
V
V
V
RMS

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