XC3S400AN-4FTG256I Xilinx Inc, XC3S400AN-4FTG256I Datasheet - Page 8

• Manufacturer Part Number: XC3S400AN-4FTG256I
• Description: IC FPGA SPARTAN-3AN 256FTBGA
• Manufacturer: Xilinx Inc
• Series: Spartan™-3ANr

Specifications of XC3S400AN-4FTG256I

• Number Of Logic Elements/cells: 8064
• Number Of Labs/clbs: 896
• Total Ram Bits: 368640
• Number Of I /o: 195
• Number Of Gates: 400000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 256-LBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 1: Overview and SPI_ACCESS Interface
Table 1-1: In-System Flash Memory Summary
8
Page Aligned User Data (maximizes available data space but limits Sector Protect, Sector Lockdown features)
Sector Aligned User Data (user data aligned to sectors for Sector Protect, Sector Lockdown features)
MultiBoot FPGA Configuration
In-System Flash (ISF) memory bits
SRAM page buffers
Default Addressing Mode
Optional Power-of-2 Addressing Mode
Pages
Blocks
Sectors
Pages per Block
Pages per Sector
Bytes per Block
Bytes per Sector
FPGA configuration bitstream size (uncompressed)
Pages required for FPGA bitstream,
always starting at page 0
Pages available for user application beyond FPGA
configuration bitstream, data aligned to next page
boundary,
Total Flash memory bits available for user application,
Default Addressing Mode
Sectors required per uncompressed FPGA bitstream
Sectors available for user application beyond FPGA
configuration bitstream, aligned to next sector
boundary
Total bits available for user application in remaining
sectors,
Maximum number of uncompressed MultiBoot FPGA
configuration images
Total sectors available for user application, beyond
MultiBoot FPGA configuration bitstreams
Total Flash memory bits available for user application,
beyond MultiBoot FPGA configuration bitstreams,
sector aligned,
Default Addressing Mode
Default Addressing Mode
Default Addressing Mode
Description
page size (bytes)
page size (bytes)
Power-of-2
Default
www.xilinx.com
1,081,344
3S50AN
(0.61M)
(0.51M)
437,312
642,048
540,672
(627K)
(528K)
33,792
(1M+)
2,112
264
256
512
128
208
214
304
64
1
4
8
2
2
2
0
0
3S200AN
4,325,376
1,196,128
3,127,872
2,703,360
1,081,344
Spartan-3AN FPGA In-System Flash User Guide
(3,054K)
(2,640K)
(1,056K)
(2.98M)
(2.57M)
(1.03M)
(4M+)
67,584
2,048
2,112
1,481
264
256
256
256
567
585
2
8
8
3
5
2
2
Spartan-3AN FPGA
3S400AN
4,325,376
1,886,560
2,437,248
2,162,688
(2,380K)
(2,112K)
(2.32M)
(2.06M)
67,584
(4M+)
2,048
1,154
2,112
264
256
256
256
894
922
2
8
8
4
4
2
0
0
UG333 (v2.1) January 15, 2009
3S700AN
8,650,752
2,732,640
5,917,824
5,406,720
2,162,688
(5,779K)
(5,280K)
(2,112K)
(5.64M)
(5.15M)
(2.06M)
(8M+)
67,584
4,096
2,112
1,294
1,335
2,802
264
256
512
256
16
10
2
8
6
2
4
3S1400AN
17,301,504
12,545,280
11,894,784
(12,251K)
(11,616K)
4,755,296
6,488,064
(11.96M)
(11.34M)
(6,336K)
(6.18M)
(16M+)
135,168
4,096
4,224
1,126
1,161
2,970
528
512
512
256
16
11
2
8
5
2
6
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