73M1866B-IMR/F Maxim Integrated Products, 73M1866B-IMR/F Datasheet - Page 12

• Manufacturer Part Number: 73M1866B-IMR/F
• Description: MICRODAA SGL PCM HIGHWAY 42-QFN
• Manufacturer: Maxim Integrated Products
• Series: MicroDAA™r

Specifications of 73M1866B-IMR/F

• Includes: PCM Highway
• Function: Data Access Arrangement (DAA)
• Interface: PCM, Serial, SPI
• Number Of Circuits: 1
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 42-VFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Power (watts): -

73M1866B/73M1966B Schematic and Layout Guidelines
High Voltage Isolation Layout Considerations
The necessary isolation requirements between the host-side and line-side circuitry must be suitable for the
specific design. Maintain at least ~1/8 inch (2.5 mm) separation between the 73M1x66B PSTN line-side and
host-side routing and components to meet UL 60950-1, CSA 60950-1-03 and IEC60950 creepage distance
requirements. Creepage is defined as the distance along a surface between two isolated conductors. All
components crossing the isolation barrier must have a voltage rating at least as high as the desired isolation
withstand voltage, including any capacitors for EMI and EMC control. If protection beyond the minimum is
required, the creepage and clearance can be increased to 3.5 mm for 3 kV isolation. The power plane should
also observe the same isolation boundaries as the other circuitry.
Note that Norway, Sweden, Denmark, and Finland typically have more stringent requirements for creepage. For
these countries the creepage requirement is 4 mm instead of 2.5 mm. The 73M1966B can be used since it can
easily be arranged to meet the 4 mm creepage requirement. Any transformers or capacitors that bridge the
barrier also need to meet the 4 mm requirement.
Should it be necessary to place capacitors across the isolation barrier, these must have voltage ratings at least as
high as the isolation that is required. These include C24, C35 and C36 in the schematic shown in Figure 4.
EMI and EMC Susceptibility
Equipment with clock rates greater than 100 kHz must be tested for EMI (high frequency energy radiated by the
product) and EMC (operation in the presence of high levels of EMI). The amount of additional protection needed
is dependent on the layout and adherence to the following good layout practices:
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The 73M1866B/1966B Demo Boards include provisions for EMI/EMC suppression on the board. These are used
when testing the bare board for EMI/EMC, but are not necessary if the modem is mounted in an EMI/EMC
shielded case. Attention to high-frequency and low-frequency bypassing can minimize EMI at the source.
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The layout must limit the area of any current loops to a minimum, maintaining close routing between source
and return current paths.
Route power supply traces such that the source and return current paths are on opposite sides of the PCB
and directly beneath each other. This keeps the loop area to a minimum.
Use ground and power planes on the 73M1x66B host-side, but avoid these on the 73M1x66B line-side
circuitry.
A shielded enclosure will reduce most of the EMI/EMC; so minimal additional EMI filtering may only be
needed.
EMI/EMC components at the entry/exit point for the analog signals (Tip and Ring) will usually be sufficient to
maintain conducted emissions at acceptable levels and reduce susceptibility.
Use only UL, CSA or TUV approved components when they cross the isolation barrier or for network
protection to assure compliant performance for the DAA.
Bypassing with X7R ceramic capacitors will yield the best results.
For the best high frequency results, use 1000 pF capacitors in parallel with a 0.1
supply bypassing.
Shielding by the product enclosure will minimize the requirements for added protection directly on the
73M1866B/1966B circuits.
µ
F and 3.3
µ
F for power
AN_1x66B_003
Rev. 3.5