TDA7491HV13TR STMicroelectronics, TDA7491HV13TR Datasheet - Page 35

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TDA7491HV13TR

Manufacturer Part Number
TDA7491HV13TR
Description
IC AMP AUD CLASS D BTL PWRSSO36
Manufacturer
STMicroelectronics
Type
Class Dr
Datasheets

Specifications of TDA7491HV13TR

Output Type
2-Channel
Max Output Power X Channels @ Load
20W x 2 @ 8 Ohm
Voltage - Supply
5 V ~ 18 V
Features
Depop, Differential Inputs, Mute, Short-Circuit and Thermal Protection, Standby
Mounting Type
Surface Mount
Package / Case
*
Amplifier Class
D
No. Of Channels
2
Output Power
20W
Supply Voltage Range
5V To 18V
Thd + N
0.1% @ 1W, 8ohm, VCC=18V
Load Impedance
8ohm
Operating Temperature Range
0°C To +70°C
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-11055-2

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TDA7491HV
7.4
7.4.1
7.4.2
Internal and external clocks
The clock of the class-D amplifier can be generated internally or can be driven by an
external source.
If two or more class-D amplifiers are used in the same system, it is recommended that all
devices operate at the same clock frequency. This can be implemented by using one
TDA7491HV as master clock, while the other devices are in slave mode (that is, externally
clocked. The clock interconnect is via pin SYNCLK of each device. As explained below,
SYNCLK is an output in master mode and an input in slave mode.
Master mode (internal clock)
Using the internal oscillator, the output switching frequency, f
resistor, R
where R
In master mode, pin SYNCLK is used as a clock output pin, whose frequency is:
For master mode to operate correctly then resistor R
below in
Slave mode (external clock)
In order to accept an external clock input the pin ROSC must be left open, that is, floating.
This forces pin SYNCLK to be internally configured as an input as given in
The output switching frequency of the slave devices is:
Table 9.
Figure 54. Master and slave connection
Master
Slave
f
f
f
SW
SYNCLK
SW
OSC
Table
= 10
= f
OSC
SYNCLK
Mode
How to set up SYNCLK
is in kΩ.
= 2 * f
6
, connected to pin ROSC:
Cosc
100 nF
9.
/ ((16 * R
SW
/ 2
ROSC
OSC
TDA7491HV
Master
Rosc
39 kΩ
+ 182) * 4) kHz
Doc ID 14242 Rev 5
R
Floating (not connected)
OSC
SYNCLK
< 60 kΩ
Output
ROSC
OSC
SYNCLK
must be less than 60 kΩ as given
TDA7491HV
Input
SW
Output
Input
Slave
, is controlled by the
Application information
ROSC
SYNCLK
Table
9.
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