RT8482GS Richtek USA Inc, RT8482GS Datasheet - Page 13

• Manufacturer Part Number: RT8482GS
• Description: IC LED DVR BUCK/BOOST 2A 8SOP
• Manufacturer: Richtek USA Inc

Specifications of RT8482GS

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 1028-1005-2

P
WQFN-16L 3x3 packages
P
SOP-16 packages
The maximum power dissipation depends on operating
ambient temperature for fixed T
resistance θ
derating curves allows the designer to see the effect of
rising ambient temperature on the maximum power
allowed.
Layout Consideration
PCB layout is very important when designing power
switching converter circuits. Some recommended layout
guidelines are suggested as follows :
DS8482-00 August 2010
D(MAX)
D(MAX)
The power components L1, D1, C
be placed as close to each other as possible to reduce
the ac current loop area. The PCB trace between power
components must be as short and wide as possible
due to large current flow through these traces during
operation.
The input capacitor C
VCC pin as possible.
Place the compensation components as close to VC
pin as possible to avoid noise pick up.
Connect GND pin and Exposed Pad to a large ground
plane for maximum power dissipation and noise
reduction.
Figure 5. Derating Curves for RT8482 Packages
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
= (125°C − 25°C) / (68°C/W) = 1.471W for
= (125°C − 25°C) / (85°C/W) = 1.176W for
0
JA
. For RT8482 packages, the Figure 5 of
25
Ambient Temperature (°C)
SOP-16
VCC
50
must be placed as close to
WQFN-16L 3x3
75
IN
J(MAX)
, M1 and C
Four Layers PCB
and thermal
100
OUT
must
125
Place these components as close to each other as possible
R
SENS
C
GND
OUT
D1
R
SW
M1
Locate the compensation components as
close to VC pin as possible
Figure 6. PCB Layout Guide
L1
GBIAS
R
GATE
C
VC
ISW
VC
ISP
ISN
NC
NC
VC
2
3
4
5
6
7
8
C
IN
16
15
14
13
12
11
10
9
GND
VCC
OVP
EN
NC
SS
DCTL
ACTL
RT8482
www.richtek.com
GND
V
IN
C
C
VCC
SS
Locate input
capacitor as
close to VCC
as possible
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