IDTTSE2002B3CNRG8 IDT, Integrated Device Technology Inc, IDTTSE2002B3CNRG8 Datasheet - Page 20

no-image

IDTTSE2002B3CNRG8

Manufacturer Part Number
IDTTSE2002B3CNRG8
Description
IC TEMP SENS EEPROM DFN-8
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDTTSE2002B3CNRG8

Function
Temp Monitoring System (Sensor)
Topology
ADC (Sigma Delta), Control Logic, Register Bank
Sensor Type
Internal
Sensing Temperature
-20°C ~ 125°C
Output Type
2-Wire Serial, I²C™/SMBUS™
Output Alarm
No
Output Fan
No
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-20°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-VFDFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
800-2033-2
Sequential Read
and sends additional clock pulses so that the device continues to output the next byte in sequence. To terminate the stream of bytes, the bus master
must not acknowledge the last byte, and must generate a Stop condition (refer to the Read Mode Sequence figure). The output data comes from
consecutive addresses, with the internal address counter automatically incremented after each byte output. After the last memory address, the
address counter 'rolls-over', and the device continues to output data from memory address 0x00.
Acknowledge in Read Mode
not drive Serial Data (SDA) Low during this time, the device terminates the data transfer and returns to an idle state to await the next valid START
condition. This has no effect on the TS operational status.
Acknowledge When Writing Data or Defining Write Protection
Acknowledge When Reading the Write Protection
Temperature Sensor (TS) Device Operation
SA1, and SA0. In the event SA0 is in the high voltage state, the device interprets the voltage as a logic '1' at the pin. The Temperature Register Set
stores the temperature data, limits, and configuration values. All registers in the address space from 0x00 through 0x08 are 16-bit registers accessed
through block read and write commands as detailed in the TS Write Operation section.
Permanently
Protected
Protected with
SWP
Not Protected
This operation can be used after a Current Address Read or a Random Address Read. The bus master does acknowledge the data byte output,
For all Read commands to the SPD, the device waits, after each byte read, for an acknowledgment during the 9th bit time. If the bus master does
The TSE2002B3C Temperature Register Set is accessed though the I
PSWP
Not Set
Not Set
Status
Status
Set
Set
X
Note 1: Software must accept either return code.
Note: X = Set or Not Set.
SWP Status
PSWP, SWP, or CWP
PSWP, SWP, or CWP
Page or byte write in
Page or byte write in
Not Set
Page or byte write
lower 128 bytes
lower 128 bytes
Set
X
X
X
Instruction
PSWP
SWP
CWP
Instruction
Read PSWP
Read PSWP
Read SWP
Read SWP
Read SWP
NoACK
NoACK
ACK
ACK
ACK
ACK
ACK
ACK
ACK
Not Significant
Not Significant
Not Significant
Not Significant
Not Significant
NoACK
NoACK
NoACK
ACK
ACK
ACK
Address
Address
Address
Address
20 of 30
(Instructions with R/W# Bit=1)
2
C address 0011_bbb_R/W#. The “bbb” denotes the current state of SA2,
Not Significant
Not Significant
Not Significant
Not Significant
Not Significant
Address
NoACK
NoACK
ACK
ACK
ACK
ACK
ACK
ACK
ACK
(Instructions with R/W# Bit=0)
Not Significant
Not Significant
Not Significant
Not Significant
Not Significant
Data Byte
Data
Data
Data
NoACK
NoACK
NoACK
NoACK
NoACK
ACK
Not Significant
Not Significant
Not Significant
Not Significant
Not Significant
NoACK
NoACK
Data Byte
NoACK
NoACK
ACK or
ACK or
ACK
ACK
ACK
ACK
ACK
1
1
May 12, 2010
Write Cycle
NoACK
NoACK
NoACK
NoACK
NoACK
(t
Yes
Yes
Yes
Yes
Yes
Yes
ACK
No
No
W
)

Related parts for IDTTSE2002B3CNRG8