RT8023GQW Richtek USA Inc, RT8023GQW Datasheet - Page 18

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RT8023GQW

Manufacturer Part Number
RT8023GQW
Description
IC CONV STP-DWN W/2 LDO 24WQFN
Manufacturer
Richtek USA Inc
Datasheet

Specifications of RT8023GQW

Topology
Step-Down (Buck) Synchronous (1), Linear (LDO) (2)
Function
Any Function
Number Of Outputs
3
Frequency - Switching
1.2MHz
Voltage/current - Output 1
0.8 V ~ 5 V, 1.5A
Voltage/current - Output 2
0.8 V ~ 5 V, 700mA
Voltage/current - Output 3
0.8 V ~ 5 V, 350mA
W/led Driver
No
W/supervisor
No
W/sequencer
Yes
Voltage - Supply
2.4 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-WFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
RT8023GQW
Manufacturer:
INTERSIL
Quantity:
36 710
Company:
Part Number:
RT8023GQW
Quantity:
220
RT8023
Layout Consideration
Follow the PCB layout guidelines for optimal performance
of RT 8023
www.richtek.com
18
Please refer to the PSRR section for layout
improvement.
Keep the traces of the main current paths as short and
wide as possible.
Put the input capacitor as close as possible to the device
pins (VIN and GND).
LX node is with high frequency voltage swing and should
be kept small area. Keep analog components away from
LX node to prevent stray capacitive noise pick-up.
Connect feedback network behind the output capacitors.
Keep the loop area small. Place the feedback
components near the RT8023. For the LDO layout part,
put the output capacitor as close as possible to the
device pins. (VIN and GND).
Connect all analog grounds to a command node and
then connect the command node to the power ground
behind the output capacitors.
Put input capacitor as
dose as possible to
V
IN1
and GND pins.
Keep output capacitor
C5 near the IC.
C2
C1
R1
V
IN1
R2
PGOOD1
PGND
VDD1
The PHASE1 trace must be
wide and short, keep sensitive
components away from this
trace.
VIN1
VIN1
VIN1
C5
The resistive dividers R3, R4, R7,
R8, R9 and R10 must be located
as close to the FB pin as possible.
R4
1
2
3
4
5
6
L1
24
7
V
OUT1
23
8
R3
Figure 7
PGND
22
9
21
10
C4
20
11
25
C7
19
12
Figure 6. Derating Curves for RT8023 Packages
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
Input capacitors C3, C4 and output capacitors
C6, C7 must be located at a distance of not
more than 1cm from RT8023 to GND.
C3
18
17
16
15
14
13
0
FB3
PGOOD3
EN3
EN2
PGOOD2
FB2
25
R10
R7
WQFN-24L 4x4
Ambient Temperature (°C)
C6
R6
R9
R5
R8
50
V
OUT3
V
V
DS8023-02 February 2011
IN3
IN2
75
100
125

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