AD9224-EB Analog Devices Inc, AD9224-EB Datasheet - Page 13

• Manufacturer Part Number: AD9224-EB
• Description: BOARD EVAL FOR AD9224
• Manufacturer: Analog Devices Inc

Specifications of AD9224-EB

• Rohs Status: RoHS non-compliant
• Number Of Adc's: 1
• Number Of Bits: 12
• Sampling Rate (per Second): 40M
• Data Interface: Parallel
• Inputs Per Adc: 1 Differential
• Input Range: 4 Vpp
• Power (typ) @ Conditions: 425mW @ 40MSPS
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: AD9224
• Lead Free Status / Rohs Status: Not Compliant

REV. A
Simple Op Amp Buffer
In the simplest case, the input signal to the AD9224 will already
be biased at levels in accordance with the selected input range.
It is simply necessary to provide an adequately low source imped-
ance for the VINA and VINB analog pins of the A/D. Figure 19
shows the recommended configuration a single-ended drive
using an op amp. In this case, the op amp is shown in a nonin-
verting unity gain configuration driving the VINA pin. The
internal reference drives the VINB pin. Note that the addi-
tion of a small series resistor of 30
VINA and VINB will be beneficial in nearly all cases. Refer to
the Analog Input Operation section for a discussion on resistor
selection. Figure 19 shows the proper connection for a 0 V to
4 V input range. Alternative single ended ranges of 0 V to 2
VREF can also be realized with the proper configuration of
VREF (refer to the Using the Internal Reference section). Head-
room limitations of the op amp must always be considered.
Op Amp with DC Level-Shifting
Figure 20 shows a dc-coupled level-shifting circuit employing
an op amp, A1, to sum the input signal with the desired dc set.
Configuring the op amp in the inverting mode with the given
resistor values results in an ac signal gain of –1. If the signal
inversion is undesirable, interchange the VINA and VINB con-
nections to reestablish the original signal polarity. The dc volt-
age at VREF sets the common-mode voltage of the AD9224.
For example, when VREF = 1.0 V, the input level from the op
amp will also be centered around 1.0 V. The use of ratio matched,
thin-film resistor networks will minimize gain and offset errors.
Also, an optional pull-up resistor, RP, may be used to reduce
the output load on VREF to less than 1 mA maximum.
Figure 20. Single-Ended Input with DC-Coupled Level Shift
+VREF
–VREF
VREF
Figure 19. Single-Ended AD9224 Op Amp Drive Circuit
4V
0V
+V
**OPTIONAL PULL-UP RESISTOR WHEN USING INTERNAL REFERENCE
*OPTIONAL RESISTOR NETWORK-OHMTEK ORNA500D
R
P
**
0V
0.1 F
500 *
DC
+V
–V
U1
500 *
500 *
NC = NO CONNECT
3
2
10 F
2.0V
A1
+V
R
4
7
CC
S
0.1 F
NC
NC
500 *
1
5
0.1 F
to 100
6
R
S
R
R
S
S
VINA
VREF
VINB
SENSE
connected to
AD9224
VINB
VINA
AD9224
–13–
AC COUPLING AND INTERFACE ISSUES
For applications where ac coupling is appropriate, the op amp’s
output can be easily level-shifted via a coupling capacitor. This
has the advantage of allowing the op amp’s common-mode level
to be symmetrically biased to its midsupply level (i.e. (V
V
their power supplies typically provide the best ac performance as
well as greatest input/output span. Various high speed/perfor-
mance amplifiers that are restricted to +5 V/–5 V operation and/
or specified for +5 V single-supply operation can be easily
configured for the 4 V or 2 V input span of the AD9224. A
differential input connection should be considered for opti-
mum ac performance.
Simple AC Interface
Figure 21 shows a typical example of an ac-coupled, single-
ended configuration. The bias voltage shifts the bipolar, ground-
referenced input signal to approximately AVDD/2. The value
for C1 and C2 will depend on the size of the resistor, R. The
capacitors, C1 and C2, are a 0.1 F ceramic and 10 F tanta-
lum capacitor in parallel to achieve a low cutoff frequency while
maintaining a low impedance over a wide frequency range. The
combination of the capacitor and the resistor form a high-pass filter
with a high-pass –3 dB frequency determined by the equation,
The low impedance VREF voltage source both biases the VINB
input and provides the bias voltage for the VINA input. Figure
21 shows the VREF configured for 2.0 V thus the input range
of the A/D is 0 V to 4 V. Other input ranges could be selected
by changing VREF.
–2V
+2V
EE
0V
)/2). Op amps that operate symmetrically with respect to
V
IN
AD9631
f
–3 dB
Figure 21. AC-Coupled Input
+5V
–5V
= 1/(2
0.1 F
0.1 F
10 F
C1
C2
10 F
4.5
2.5
0.5
R
(C1 + C2))
+V
R
R
+V
AD9224
R
R
R
R
S
S
AD9224
VINA
VINB
CC
SENSE
+