SCA3000-D01 VTI Technologies, SCA3000-D01 Datasheet - Page 27

• Manufacturer Part Number: SCA3000-D01
• Description: ACCELEROMETER 3-AXIS +/-2G SPI
• Manufacturer: VTI Technologies
• Series: SCA3000r

Specifications of SCA3000-D01

• Axis: X, Y, Z
• Acceleration Range: ±2g
• Sensitivity: 1333 counts/g
• Voltage - Supply: 2.35 V ~ 3.6 V
• Output Type: Digital
• Interface: I²C
• Mounting Type: Surface Mount
• Package / Case: 18-SMD
• For Use With: 551-1041 - SCA3000-D01 DEMOKIT551-1034 - BOARD PWB W/SCA3000-D01
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Bandwidth: -
• Other names: 551-1033-2; SCA3000-D01-10

4.2 I
4.2.1
4.2.1.1
4.2.1.2
4.2.1.3
VTI Technologies Oy
www.vti.fi
2
I
C Interface
2
C frame format
I
I
Decremented register read
2
2
C write mode
C read mode
-
-
I
master is defined as a micro controller providing the serial clock (SCL), and the slave as any
integrated circuit receiving the SCL clock from the master. The SCA3000 sensor always operates
as a slave device in master-slave operation mode. When using an SPI
addressing is used (slaves have dedicated CSB signals), the I
addressing (slave devices have dedicated bit patterns as addresses).
The SCA3000 is compatible to the Philips I
interface are:
In addition to the Philips specification, the SCA3000 I
mode.
In I
to be written. If multiple data words are transferred by the master, the register address is
decreased automatically by one (see cases 1 and 2 in Figure 10).
The read mode operates as described in Philips I
content of the register which address is defined in I2C_RD_SEL register. So when performing the
I
before actual read operation. Read operation starts from register address that has been written
earlier in I2C_RD_SEL register. Read data is acknowledged by I
address change depends on the selected start address (see cases 3 and 4 in Figure 10).
Decremented reading is possible only for registers X_LSB ... Z_MSB. Refer to decremented read
with SPI interface section 4.1.3.2.
2
2
C is a 2-wire serial interface. It consists of one master device and one or more slave devices. The
C read operation, the register address to be read has to be written into I2C_RD_SEL register
If address is some of registers between X_LSB
cycled as follows:
...
If the start address is any other register, the read address is NOT automatically incremented or
decremented (the data transfer continues from the same address.) This enables the burst read
from output ring buffer (register BUF_DATA).
2
C write
Y_MSB
-
-
-
-
-
mode,
10-bit addressing, SCA3000 I
Supports standard mode and fast mode
Start / Restart / Stop
Slave transceiver mode
Designed for low power consumption
the first 8 bits after device address define the SCA3000 internal register address
Y_LSB
Doc.Nr. 8257300A.07
X_MSB
X_LSB
2
C device address is 0x1F1
2
C specification V2.1. Main used features of the I
Z_MSB
2
C specification. I
2
C interface supports multiple write and read
Z_MSB the register address is automatically
Z_LSB
2
C interface uses a software based
2
C read operation returns the
2
C master. Automatic read
Y_MSB
interface,
Y_LSB
SCA3000 Series
a hardware
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2
C