LIS302DLHTR STMicroelectronics, LIS302DLHTR Datasheet
LIS302DLHTR
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LIS302DLHTR
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LIS302DLHTR Summary of contents
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... Vibration monitoring and compensation Table 1. Device summary Order codes Temperature range [° C] LIS302DLH LIS302DLHTR June 2009 MEMS digital output motion sensor Description The LIS302DLH is an ultra low-power high performance three axes linear accelerometer belonging to the “piccolo” family, with digital ...
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Contents Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.1 Block ...
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LIS302DLH 6 Register mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of tables List of tables Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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LIS302DLH Table 49. INT2_SRC register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of figures List of figures Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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LIS302DLH 1 Block diagram and pin description 1.1 Block diagram Figure 1. Block diagram a SELF TEST 1.2 Pin description Figure 2. Pin connection Y 6 TOP VIEW X+ CHARGE Y+ AMPLIFIER Z+ A/D MUX CONVERTER TRIMMING ...
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Block diagram and pin description Table 2. Pin description Pin 8/37 Name Vdd_IO Power supply for I/O pins GND 0V supply Reserved Connect to Vdd GND ...
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LIS302DLH 2 Mechanical and electrical specifications 2.1 Mechanical characteristics Table 3. Mechanical characteristics @ Vdd = 2 °C unless otherwise noted Symbol Parameter FS Measurement range So Sensitivity Sensitivity change vs TCSo temperature g Typical zero- ...
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Mechanical and electrical specifications 2.2 Electrical characteristics Table 4. Electrical characteristics @ Vdd = 2 °C unless otherwise noted Symbol Parameter Vdd Supply voltage Vdd_IO I/O pins supply voltage Current consumption Idd in normal mode Current ...
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LIS302DLH 2.3 Communication interface characteristics 2.3.1 SPI - serial peripheral interface Subject to general operating conditions for Vdd and Top. Table 5. SPI slave timing values Symbol tc(SPC) SPI clock cycle fc(SPC) SPI clock frequency tsu(CS) CS setup time th(CS) ...
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Mechanical and electrical specifications 2 2.3 Inter IC control interface Subject to general operating conditions for Vdd and top. 2 Table slave timing values Symbol Parameter f SCL clock frequency (SCL) t SCL clock ...
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LIS302DLH 2.4 Absolute maximum ratings Stresses above those listed as “absolute maximum ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device under these conditions is not implied. Exposure to ...
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Mechanical and electrical specifications 2.5 Terminology 2.5.1 Sensitivity Sensitivity describes the gain of the sensor and can be determined e.g. by applying 1 g acceleration to it. As the sensor can measure DC accelerations this can be done easily by ...
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LIS302DLH 3 Functionality The LIS302DLH is a nano, low-power, digital output 3-axis linear accelerometer packaged in a LGA package. The complete device includes a sensing element and an IC interface able to take the information from the sensing element and ...
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Application hints 4 Application hints Figure 5. LIS302DLH electrical connection Vdd 10uF 100nF GND The device core is supplied through Vdd line while the I/O pads are supplied through Vdd_IO line. Power supply decoupling capacitors (100 nF ceramic, 10 µF ...
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LIS302DLH 5 Digital interfaces The registers embedded inside the LIS302DLH may be accessed through both the I SPI serial interfaces. The latter may be SW configured to operate either in 3-wire or 4-wire interface mode. The serial interfaces are mapped ...
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... LSb is ‘1’ (address 0011001b) else if SA0 pad is connected to ground, LSb value is ‘0’ (address 0011000b). This solution permits to connect and address two different accelerometers to the same I Data transfer with acknowledge is mandatory. The transmitter must release the SDA line during the acknowledge pulse. The receiver must then pull the data line LOW so that it remains stable low during the HIGH period of the acknowledge clock pulse ...
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LIS302DLH Table 12. Transfer when master is writing multiple bytes to slave: Master ST Slave Table 13. Transfer when master is receiving (reading) one byte of data from slave: Master ST SAD + W Slave Table 14. Transfer when Master ...
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Digital interfaces Figure 6. Read and write protocol CS SPC SDI SDO CS is the serial port enable and it is controlled by the SPI master. It goes low at the start of the transmission and goes back high at ...
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LIS302DLH The SPI Read command is performed with 16 clock pulses. Multiple byte read command is performed adding blocks of 8 clock pulses at the previous one. bit 0: READ bit. The value is 1. bit 1: MS bit. When ...
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Digital interfaces Figure 10. Multiple bytes SPI write protocol (2 bytes example) CS SPC SDI RW MS 5.2.3 SPI read in 3-wires mode 3-wires mode is entered by setting to ‘1’ bit SIM (SPI serial interface mode selection) in CTRL_REG4. ...
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LIS302DLH 6 Register mapping The table given below provides a listing of the 8 bit registers embedded in the device and the related addresses: Table 15. Register address map Name Reserved (do not modify) WHO_AM_I Reserved (do not modify) CTRL_REG1 ...
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Register description The content of the registers that are loaded at boot should not be changed. They contain the factory calibration values. Their content is automatically restored when the device is powered-up. 7 Register description The device contains a set ...
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LIS302DLH data in the low-power modes are computed with low-pass filter cut-off frequency defined by DR1, DR0 bits. DR bits, in the normal-mode operation, select the data rate at which acceleration samples are produced. In low-power mode they define the ...
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Register description Table 22. CTRL_REG2 description (continued) High pass filter enabled for interrupt 2 source. Default value: 0 HPen2 (0: filter bypassed; 1: filter enabled) High pass filter enabled for interrupt 1 source. Default value: 0 HPen1 (0: filter bypassed; ...
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LIS302DLH 7.4 CTRL_REG3 [Interrupt CTRL register] (22h) Table 25. CTRL_REG3 register IHL PP_OD Table 26. CTRL_REG3 description Interrupt active high, low. Default value: 0 IHL (0: active high; 1:active low) Push-pull/Open drain selection on interrupt pad. Default value 0. PP_OD ...
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Register description Table 29. CTRL_REG4 description Block data update. Default value: 0 BDU (0: continuos update; 1: output registers not updated between MSB and LSB reading) Big/little endian data selection. Default value 0. BLE (0: data LSB @ lower address; ...
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LIS302DLH CTRL_REG1. Although the device is in normal mode, CTRL_REG1 content is not automatically changed to “normal mode” configuration. 7.7 HP_FILTER_RESET (25h) Dummy register. Reading at this address zeroes instantaneously the content of the internal high pass-filter. If the high ...
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Register description Table 36. STATUS_REG description (continued) ZYXDA X, Y and Z axis new data available. Default value: 0 (0: a new set of data is not yet available new set of data is available) ZDA Z axis ...
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LIS302DLH Table 38. INT1_CFG description Enable interrupt generation on Y high event. Default value: 0 YHIE (0: disable interrupt request; 1: enable interrupt request on measured accel. value higher than preset threshold) Enable interrupt generation on Y low event. Default ...
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Register description Table 41. INT1_SRC description X high. Default value (0: no interrupt High event has occurred) X low. Default value (0: no interrupt Low event has occurred) Interrupt 1 source register. ...
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LIS302DLH Table 47. INT2_CFG description AND/OR combination of interrupt events. Default value: 0. AOI (See table below) 6 direction detection function enable. Default value (See table below) Enable interrupt generation on Z high event. Default value: 0 ZHIE ...
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Register description Table 50. INT2_SRC description Interrupt active. Default value (0: no interrupt has been generated; 1: one or more interrupts have been generated) Z high. Default value (0: no interrupt high event has ...
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LIS302DLH 8 Package information In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK ...
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Revision history 9 Revision history Table 55. Document revision history Date 04-Jun-2009 36/37 Revision 1 Initial release Doc ID 15797 Rev 1 LIS302DLH Changes ...
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... LIS302DLH Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...