LMC6064AIM National Semiconductor, LMC6064AIM Datasheet - Page 10

• Manufacturer Part Number: LMC6064AIM
• Description: IC, OP-AMP, 100kHZ, 0.035V/µs, SOIC-14
• Manufacturer: National Semiconductor

Specifications of LMC6064AIM

• Op Amp Type: Precision
• No. Of Amplifiers: 4
• Bandwidth: 100kHz
• Slew Rate: 0.035V/µs
• Supply Voltage Range: 4.5V To 15V
• Amplifier Case Style: SOIC
• No. Of Pins: 14
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

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Applications Hints
PRINTED-CIRCUIT-BOARD LAYOUT
FOR HIGH-IMPEDANCE WORK
It is generally recognized that any circuit which must operate
with less than 1000 pA of leakage current requires special
layout of the PC board. When one wishes to take advantage
of the ultra-low bias current of the LMC6064, typically less
than 10 fA, it is essential to have an excellent layout. Fortu-
nately, the techniques of obtaining low leakages are quite
simple. First, the user must not ignore the surface leakage of
the PC board, even though it may sometimes appear accept-
ably low, because under conditions of high humidity or dust
or contamination, the surface leakage will be appreciable.
To minimize the effect of any surface leakage, lay out a ring
of foil completely surrounding the LMC6064’s inputs and the
terminals of capacitors, diodes, conductors, resistors, relay
terminals etc. connected to the op-amp’s inputs, as in Figure
4 . To have a significant effect, guard rings should be placed
on both the top and bottom of the PC board. This PC foil
must then be connected to a voltage which is at the same
voltage as the amplifier inputs, since no leakage current can
flow between two points at the same potential. For example,
a PC board trace-to-pad resistance of 10
mally considered a very large resistance, could leak 5 pA if
the trace were a 5V bus adjacent to the pad of the input. This
would cause a 100 times degradation from the LMC6064’s
actual performance. However, if a guard ring is held within
5 mV of the inputs, then even a resistance of 10
cause only 0.05 pA of leakage current. See Figure 5 for
typical connections of guard rings for standard op-amp con-
figurations.
FIGURE 4. Example of Guard Ring in P.C. Board
Layout
(Continued)
12
, which is nor-
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would
10
The designer should be aware that when it is inappropriate
to lay out a PC board for the sake of just a few circuits, there
is another technique which is even better than a guard ring
on a PC board: Don’t insert the amplifier’s input pin into the
board at all, but bend it up in the air and use only air as an
insulator. Air is an excellent insulator. In this case you may
have to forego some of the advantages of PC board con-
struction, but the advantages are sometimes well worth the
effort of using point-to-point up-in-the-air wiring. See Figure
6 .
Latchup
CMOS devices tend to be susceptible to latchup due to their
internal parasitic SCR effects. The (I/O) input and output pins
look similar to the gate of the SCR. There is a minimum
current required to trigger the SCR gate lead. The LMC6064
and LMC6082 are designed to withstand 100 mA surge
current on the I/O pins. Some resistive method should be
used to isolate any capacitance from supplying excess cur-
rent to the I/O pins. In addition, like an SCR, there is a
minimum holding current for any latchup mode. Limiting
current to the supply pins will also inhibit latchup
susceptibility.
FIGURE 5. Typical Connections of Guard Rings
Non-Inverting Amplifier
Inverting Amplifier
Follower
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