CS8427-DZ Cirrus Logic Inc, CS8427-DZ Datasheet - Page 46

• Manufacturer Part Number: CS8427-DZ
• Description: IC, DIGITAL AUDIO TRANSCEIVER, TSSOP-28
• Manufacturer: Cirrus Logic Inc

Specifications of CS8427-DZ

• Audio Control Type: Digital
• Control Interface: I2C, Serial
• Control / Process Application: AV & DVD Receivers, CD-R, Digital Mixing Consoles
• Supply Voltage Range: 2.85V To 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

15. APPLICATIONS
15.1
When RST is low, the CS8427 enters a low power
mode and all internal states are reset, including the
control port and registers, and the outputs are mut-
ed. When RST is high, the control port becomes
operational and the desired settings should be
loaded into the control registers. Writing a 1 to the
RUN bit will then cause the part to leave the low
power state and begin operation. After the PLL has
settled, the AES3 and serial audio outputs will be
enabled.
Some options within the CS8427 are controlled by
a start-up mechanism. During the reset state,
some of the output pins are reconfigured internally
to be inputs. Immediately upon exiting the reset
state, the level of these pins is sensed. The pins
are then switched to be outputs. This mechanism
allows output pins to be used to set alternative
modes in the CS8427 by connecting a 47 kΩ resis-
tor to between the pin and either VL+ (HI) or DGND
(LO). For each mode, every start-up option select
pin MUST have an external pull-up or pull-down re-
sistor. In software mode, the only start-up option
pin is EMPH, which is used to set a chip address
bit for the control port in I²C mode. Hardware
modes use many start-up options, which are de-
tailed in the hardware definition section at the end
of this data sheet.
15.2
The CS8427 has a register that contains a four bit
code to indicate that the addressed device is a
CS8427. This is useful when other CS84XX family
members are resident in the same system, allow-
ing common software modules.
The CS8427 four bit revision code is also avail-
able. This allows the software driver for the
CS8427 to identify which revision of the device is
in a particular system, and modify its behavior ac-
cordingly. To allow for future revisions, it is strongly
recommend that the revision code is read into a
variable area within the microcontroller, and used
wherever appropriate as revision details become
known.
46
Reset, Power Down and Start-up
ID Code and Revision Code
15.3
For most applications, the CS8427 can be operat-
ed from a single +5.0 V supply, following normal
supply decoupling practices, see
11. Note that the I²C protocol is supported only in
VL+ = 5.0 V mode. For applications where the re-
covered input clock, output on the RMCK pin, is re-
quired to be low jitter, then use a separate, quiet,
analog +5.0 V supply for VA+, decoupled to
AGND. In addition, a separate region of analog
ground plane around the FILT, AGND, VA+, RXP,
and RXN pins is recommended.
The VL+ supply should be well decoupled with a
0.1 μF capacitor to DGND to minimize AES3 trans-
mitter induced transients.
Extensive use of power and ground planes, ground
plane fill in unused areas and surface mount de-
coupling capacitors are recommended. Decou-
pling capacitors should be mounted on the same
side of the board as the CS8427 to minimize induc-
tance effects, and all decoupling capacitors should
be as close to the CS8427 as possible.
15.4
The serial audio output ports of multiple CS8427s
can be synchronized if all devices share the same
master clock, OSCLK, OLRCK, and RST line and
leave the reset state on the same master clock fall-
ing edge. Either all the ports need to be in slave
mode, or one can be set as a master.
Multiple AES3 transmitters can be synchronized if
all devices share the same master clock, TCBL,
and RST signals and leave the reset state on the
same master clock falling edge. The TCBL pin is
used to synchronize multiple CS8427 AES3 trans-
mitters at the channel status block boundaries.
One CS8427 must have its TCBL set to master;
the others must be set to slave TCBL. Alternative-
ly, TCBL can be derived from external logic, in
which case all the CS8427 devices should be set
to slave TCBL.
Power Supply, Grounding, and PCB
layout
Synchronization of Multiple
CS8427s
Figure 5 on page
CS8427
DS477F5