CS5361-KZ Cirrus Logic Inc, CS5361-KZ Datasheet
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CS5361-KZ
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CS5361-KZ Summary of contents
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... These applications include A/V receivers, DVD-R, CD-R, digital mixing consoles, and effects processors. ORDERING INFORMATION CS5361-KSZ -10° to 70°C 24-pin SOIC CS5361-KZZ -10° to 70°C 24-pin TSSOP Lead Free CS5361-DZZ -40° to 85°C 24-pin TSSOP Lead Free CDB5361 SCLK OVFL ...
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... TABLE OF CONTENTS 1.0 CHARACTERISTICS AND SPECIFICATIONS ...................................................................... 4 Specified Operating Conditions ................................................................................................ 4 Absolute Maximum Ratings ...................................................................................................... 4 Analog Characteristics (CS5361-KSZ/KZZ).............................................................................. 5 Analog Characteristics (CS5361-DZZ) ..................................................................................... 6 Digital Filter Characteristics ...................................................................................................... 7 DC Electrical Characteristics .................................................................................................. 10 Digital Characteristics ............................................................................................................. 10 Switching Characteristics - Serial Audio Port.......................................................................... 11 2.0 PIN DESCRIPTIONS ............................................................................................................ 14 3.0 TYPICAL CONNECTION DIAGRAM .................................................................................... 15 4.0 APPLICATIONS .................................................................................................................... 16 4.1 Operational Mode/Sample Rate Range Select ................................................................ 16 4 ...
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... Figure 21. OVFL Output Timing, Left-Justified Format ............................................. 13 Figure 22. Typical Connection Diagram ................................................................... 15 Figure 23. CS5361 Master Mode Clocking ............................................................... 17 Figure 24. CS5361 Recommended Analog Input Buffer .......................................... 18 LIST OF TABLES Table 1. CS5361 Mode Control .............................................................................. 16 Table 2. CS5361 Slave Mode Clock Ratios ........................................................... 16 Table 3. CS5361 Common Master Clock Frequencies .......................................... 17 Table 4. Revision History ....................................................................................... 23 DS467F2 2 S SAI .............................................................................. SAI ...
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... Positive Digital VD Positive Logic VL Commercial (-KSZ/-KZZ Automotive (-DZZ Symbol Analog VA VL Logic VD Digital (Note (Note (Note 3) V IND stg CS5361 Min Typ Max Unit 4.75 5.0 5.25 V 3.1 3.3 5.25 V 2.37 3.3 5. °C - °C Min Max Units -0.3 +6 ...
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... ANALOG CHARACTERISTICS (CS5361-KSZ/KZZ) Test conditions (unless otherwise specified): Input test signal kHz sine wave; measurement bandwidth kHz. Parameter Single Speed Mode kHz Dynamic Range Total Harmonic Distortion + Noise Double Speed Mode Dynamic Range 40 kHz bandwidth unweighted Total Harmonic Distortion + Noise 40 kHz bandwidth ...
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... ANALOG CHARACTERISTICS (CS5361-DZZ) Test conditions (unless otherwise specified): Input test signal kHz sine wave; measurement bandwidth kHz. Parameter Single Speed Mode Dynamic Range Total Harmonic Distortion + Noise Double Speed Mode Dynamic Range 40 kHz bandwidth unweighted Total Harmonic Distortion + Noise 40 kHz bandwidth ...
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... Response shown is for Fs equal to 48 kHz. Filter characteristics scale with Fs. DS467F2 Symbol Min Typ (Note -0.1 - (Note 6) 0. 12/ 0.0001 (Note -0.1 - (Note 6) 0. 0.0001 (Note -0.1 - (Note 6) 0. 0.0001 - 1 (Note 7) 20 (Note /Fs CS5361 Max Unit 0.47 Fs 0.035 Deg 0.45 Fs 0.035 Deg 0.24 Fs 0.035 Deg - Deg ...
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... Figure 6. Double Speed Mode Transition Band CS5361 0.46 0.48 0.50 0.52 0.54 0.56 0.58 Frequency (normalized to Fs) 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 Frequency (normalized to Fs) ...
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... Figure 8. Double Speed Mode Passband Ripple Figure 10. Quad Speed Mode Transition Band Figure 12. Quad Speed Mode Passband Ripple CS5361 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 Frequency (normalized to Fs liz liz ...
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... PCB) SOIC (Single-layer PCB) TSSOP (Single-layer PCB) SOIC 10 Symbol VL, VL, VL, VA, VD (Power-Down Mode) - (Note 9) PSRR Symbol (% Symbol θ JA-TM θ JA-SM θ JA-TS θ JA-SS CS5361 Min Typ Max - 17.5 21 27 100 - - 100 - - 198 243 - 135 161 - 2 0. ...
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... Single Speed Mode Fs Double Speed Mode Fs Quad Speed Mode Fs t setup t hold Fs = 48, 96, 192 kHz t clkw t mslr t sdo Fs t sclkw t dss t slrd Fs t sclkw t dss t slrd Fs t sclkw t dss t slrd CS5361 Min Typ Max 102 100 - 204 16 sclk 1 sclk - 740 - - 680 - 38 - 1953 - ...
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... LRCK input MSB-1 SDOUT Figure 14. Slave Mode, Left Justified SAI SCLK input t sclkw LRCK input t dss MSB MSB-1 SDOUT 2 S SAI Figure 16. Slave Mode setup Figure 17. OVFL Output Timing CS5361 t sclkw MSB MSB-1 MSB-2 t sclkw dss MSB MSB SAI t hold DS467F2 ...
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... SCLK SDATA LRCK Left Channel SCLK SDATA LRCK SCLK O VFL_R O VFL DS467F2 Figure 18. Left Justified Serial Audio Interface Figure 19 Serial Audio Interface O VFL_L Figure 20. OVFL Output Timing Figure 21. OVFL Output Timing, Left-Justified Format CS5361 Right Channel Right Channel O VFL_R 2 S Format ...
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... Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling circuits. 14 RST 1 24 FILT+ M REFGND LRCK SCLK 4 21 AINR+ MCLK 5 20 AINR GND 7 18 GND AINL- SDOUT 9 16 AINL+ MDIV 10 15 OVFL HPF S/ CS5361 2 S format for the SAI. DS467F2 ...
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... OVFL I CS5361 A/D CONVERTER MDIV SDOUT LRCK SCLK MCLK GND GND Figure 22. Typical Connection Diagram CS5361 +5Vto 2 µ RST 2 S/LJ Power Down M/S and Mode HPF Settings M0 M1 Audio Data Processor Timing Logic and Clock * Resistor may only be used derived from VA ...
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... APPLICATIONS 4.1 Operational Mode/Sample Rate Range Select The output sample rate, Fs, can be adjusted from 2 kHz to 204 kHz. The CS5361 must be set to the proper speed mode via the mode pins, M1 and M0. Refer to Table 1. M1 (Pin 14) M0 (Pin 13 4.2 System Clocking The device supports operation in either Master Mode, where the left/right and serial clocks are synchronously gen- erated on-chip, or Slave Mode, which requires external generation of the left/right and serial clocks ...
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... Fs and the serial clock equal to 64x Fs, as shown in Figure 23. Refer to Table 3 for common master clock frequencies. ÷ 1 MCLK ÷ 2 SAMPLE RATE (kHz 88.2 96 176.4 192 Table 3. CS5361 Common Master Clock Frequencies DS467F2 ÷ 256 ÷ 128 ÷ ÷ 4 MDIV ÷ 2 ÷ 1 Figure 23. CS5361 Master Mode Clocking MDIV = 0 MCLK (MHz) 8 ...
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... MHz, in addition to providing the optimum source impedance for the modulators. The use of capacitors which have a large voltage coefficient (such as general purpose ceramics) must be avoided since these can degrade signal linearity. AIN+ 100 kΩ AIN- 100 kΩ Figure 24. CS5361 Recommended Analog Input Buffer 18 × 634 Ω 470 pF COG - ...
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... MCLK and LRCK must be the same for all of the CS5361’s in the system. If only one master clock source is needed, one solution is to place one CS5361 in Master mode, and slave all of the other CS5361’s to the one master. If multiple master clock sources are needed, a possible solution would be to supply all clocks from the same external source and time the CS5361 reset with the inactive edge of MCLK ...
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... The deviation from the nominal full-scale analog output for a full-scale digital input. Gain Drift The change in gain value with temperature. Units in ppm/°C. Offset Error The deviation of the mid-scale transition (111...111 to 000...000) from the ideal. Units in mV. 20 CS5361 DS467F2 ...
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... CS5361 MILLIMETERS MAX 2.65 0.30 0.51 0.32 15.60 7.60 1.52 10.65 1.27 8° ∝ 21 ...
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... JEDEC #: MO-153 Controlling Dimension is Millimeters. CS5361 1 E1 END VIEW L MILLIMETERS NOT E NOM MAX -- 1.10 -- 0.15 0.90 0.95 0.245 0.30 2,3 7.80 7.90 1 6.40 6.50 4 ...
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... OTHER AGENTS FROM ANY AND ALL LIABILITY, INCLUDING ATTORNEYS' FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES. Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners. DS467F2 , under DC Electrical Characteristics. A Table 4. Revision History CS5361 23 ...