AS1507BTDT50 austriamicrosystems, AS1507BTDT50 Datasheet
AS1507BTDT50
Specifications of AS1507BTDT50
Related parts for AS1507BTDT50
AS1507BTDT50 Summary of contents
Page 1
... MUTE 2 SCLK SPI SPI Interface Interface 3 SDIO 4 CSN 7 GND www.austriamicrosystems.com 2 Key Features ! High Endurance: EEPROM up to 10M cycles High Reliability: EEPROM up to 150 years data ! retention @ 85°C ! Wiper Position Retained in EEPROM and loaded at Power-Up 256 Tap Positions ! ! ±0.5LSB DNL in Voltage Divider Mode ...
Page 2
... Mute. Both wiper registers are asynchronously set to zero. Data stored in the EEPROM is not affected. Active-High signal. Internal pull-down resistor. Can be left 16 MUTE unconnected if not used. Exposed Pad The exposed pad is not internally connected. Connect to GND or leave floating. N/A www.austriamicrosystems.com HIGH B DD SCLK 2 ...
Page 3
... Thermal Resistance Θ JA Operating Temperature Range Storage Temperature Range Junction Temperature Package Body Temperature 1. The maximum rating voltage must not be exceeded during Latch-up test of the device. www.austriamicrosystems.com may cause permanent damage to the device. These are stress ratings only, Min Max Units -0.3 +7.0 ...
Page 4
... V IL Digital Input Low Voltage I Digital Input Leakage Current LEAK C Digital Input Capacitance IN I Continuous DAC current CONT www.austriamicrosystems.com = -40 to +85ºC. Typ values are at V AMB Condition Digital Inputs = V or GND AMB Includes Non-Volatile Write to Memory AS1507-10 AS1507-50 & -100 AS1507-10 2 AS1507-50 & ...
Page 5
... DS t SDIO Hold after SCLK DH t SCLK-Rise to CSN-Fall Delay CS0 t CSN-Rise to SCLK-Rise Hold CS1 t CSN Pulse-Width High CSW t Write Non-Volatile Register Busy Time BUSY www.austriamicrosystems.com Condition AS1507-10 AS1507-50 AS1507-100 AS1507-10 AS1507-50 AS1507-100 T = +85ºC AMB T = +25ºC AMB T = +85ºC AMB = 5V, LOW = GND ...
Page 6
... Figure 7. DNL vs. TAP Position 100kΩ, Divider Mode 0.5 0.4 0.3 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 -0 128 160 192 224 256 Tap Position www.austriamicrosystems.com Figure 4. INL vs. TAP Position 10kΩ, Divider Mode 1 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0 128 160 192 224 256 Tap Position Figure 6. INL vs. TAP Position 50kΩ ...
Page 7
... Figure 13. DNL vs. TAP Position 100kΩ, Varistor Mode Mode 1 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0 128 160 192 224 256 Tap Position www.austriamicrosystems.com Figure 10. INL vs. TAP Position 10kΩ, Varistor Mode 2 1.6 1.2 0.8 0.4 0 -0.4 -0.8 -1.2 -1 128 160 192 224 256 Tap Position Figure 12. INL vs. TAP Position 50kΩ ...
Page 8
... Figure 17. DAC Resistor vs. Temperature 118 117 116 115 114 113 112 111 110 Temperature (°C) Figure 19. EEPROM Data Retention vs. Temperature 10000 1000 100 Temperature (°C) www.austriamicrosystems.com Figure 16. Wiper Resistance vs. TAP; 3V 180 160 140 120 100 Figure 18. Gain vs. Bandwidth - 105 125 Revision 1.00 ...
Page 9
... Low-power standby mode is enabled at CSN high. After a read access standby mode is entered 2 cycles of SCLK after issuing the last bit of the data wiper or non-volatile register. If the digital inputs are stable V leakage power dissipation of the device. This power dissipation is defined with 0.1uA (typ) at 25ºC. www.austriamicrosystems.com 16). 10). ... ...
Page 10
... Non-Volatile Registers Copy Non-Volatile Register Wiper Register Copy Non-Volatile Register Wiper Register Copy Both Non-Volatile Registers 0 to Wiper Registers www.austriamicrosystems.com time) the system must not be powered down. A write cycle on the BUSY (see Figure 22 on page 12) can use 8 clock cycles to clock in the command ...
Page 11
... SPI commands to wiper registers are not executed. Data stored in non-volatile registers are not affected by the mute command. The MUTE pin includes a pull-down resistor mute function is not required the pin can be left unconnected. www.austriamicrosystems.com 12). The first byte represents the command word starting with the 12). The first byte represents the command word starting with the Revision 1 ...
Page 12
... AS1507 Data Sheet - Figure 21. 8-Bit Command Word CSN SCLK SDIO C7 C6 Figure 22. 16-Bit Command/Data Word CSN SCLK SDIO Figure 23. 16-Bit Read Command CSN SCLK SDIO Figure 24. 16-Bit EEPROM Write Command CSN SCLK SDIO READY www.austriamicrosystems.com Revision 1. tBUSY ...
Page 13
... Connect one potentiometer of the AS1507 amp to nullify the offset voltage over the operating temperature range. Use the second potentiometer in the feedback path to adjust the gain of the op amp Figure 26. Offset Voltage and Gain Adjustment Circuit HIGHA WIPERA LOWA www.austriamicrosystems.com and can be calculated as ...
Page 14
... LED brightness control can be independently adjusted by changing the wiper position of the AS1507. Figure 29. Adjustable Voltage Reference Circuit – OUT HIGHA ADJ WIPERA LOWA www.austriamicrosystems.com (Figure 27 fixed resistor and a variable resistor 5V HIGH 30V + WIPER V OUT LOW – ...
Page 15
... Dimension b applies to metallized terminal and is measured between 0.15 and 0.30mm from terminal tip refers to the maximum number of terminals on D side. 7. Unilateral coplanarity zone applies to the exposed heat sink slug as well as the terminals. www.austriamicrosystems.com Symbol Max Notes D BSC 0 ...
Page 16
... Dual 256-Tap, Non-Volatile, AS1507-BTDT-10 ASPF SPI Digital Potentiometer Dual 256-Tap, Non-Volatile, ASPE AS1507-BTDT-50 SPI Digital Potentiometer Dual 256-Tap, Non-Volatile, ASPD AS1507-BTDT-100 SPI Digital Potentiometer www.austriamicrosystems.com Table 7. End-to-End Description Delivery Form Resistance 10kΩ Tape and Reel 50kΩ Tape and Reel 100kΩ ...
Page 17
... The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the tech- nical data herein ...