AS1112BQFT austriamicrosystems, AS1112BQFT Datasheet - Page 12

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AS1112BQFT

Manufacturer Part Number
AS1112BQFT
Description
IC, LED DRIVER, CONSTANT CURRENT, TQFN32
Manufacturer
austriamicrosystems
Datasheet

Specifications of AS1112BQFT

Led Driver Application
LED Displays, LED Signboards And Display Backlights
No. Of Outputs
16
Output Current
80mA
Output Voltage
15V
Input Voltage
3V To 5.5V
Topology
Constant Current
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AS1112
Data Sheet - D e t a i l e d D e s c r i p t i o n
Figure 10. Dot Correction Data Input Timing Diagram
Setting Greyscale Brightness
The brightness of each channel output can be adjusted using a 12 bits-per-channel PWM control scheme which results
in 4096 brightness steps, from 0% to 100% brightness. The brightness level for each output is calculated as:
Where:
GSn is the programmed greyscale value for OUTn (GSn = 0 to 4095);
n = 0 to 15 greyscale data for all outputs.
The input shift register shifts greyscale data into the greyscale register for all channels simultaneously. The complete
greyscale data format consists of 16 x 12 bit words, which forms a 192-bit wide data packet
Note: The data packet must be clocked in with the MSB first.
Figure 11. Greyscale Data Packet Format
When pin MODE is tied to GND, the AS1112 enters greyscale data input mode. The device switches the input shift reg-
ister to 192-bit width. After all data is clocked in, the rising edge of the LD signal latches the data into the greyscale reg-
ister
All greyscale data in the input shift register is replaced with status information data (SID) after latching into the grey-
scale register.
www.austriamicrosystems.com
GS15.11
(see Figure
MSB
191
MODE
SDO
CLK
SDI
LD
GS OUT15
DCn-1
...
LSB
V
GND
12).
DCn-1
CC
MSB
t
SU0
GS15.0
180
MSB
DCn
1
MSB-1
DCn-1
GS14.11
MSB-1
179
t
DCn
WH0
Dot Correction Mode
Data Input Cycle n
2
MSB-2
DCn-1
t
WL0
MSB-2
DCn
1
%Brightness =
GS OUT14:GS OUT1
DCn-1
LSB+1
Revision 1.04
LSB+1
DCn
...
95
DCn-1
4095
GSn
LSB
t
SU1
96
x 100
DCn
LSB
MSB
DCn
Data Input Cycle n +1
t
GS1.0
Dot Correction Mode
WH2
12
t
H1
GS0.11
11
(see Figure
DCn+1
MSB
1
GS OUT0
MSB-1
DCn
...
DCn+1
MSB-1
11).
2
MSB-2
DCn
GS0.0
LSB
0
(EQ 4)
12 - 18

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