THAT1246P08-U THAT Corporation, THAT1246P08-U Datasheet - Page 4

• Manufacturer Part Number: THAT1246P08-U
• Description: LINE RECEIVER, BALANCED, 1246, DIP8
• Manufacturer: THAT Corporation

Specifications of THAT1246P08-U

• Device Type: Differential
• Supply Voltage Range: 6V To 36V
• Driver Case Style: DIP
• No. Of Pins: 8
• Operating Temperature Range: 0°C To +85°C
• Operating Temperature Max: 85°C
• Operating Temperature: RoHS Compliant
• Bandwidth: 8.6MHz
• Base Number: 1246
• Rohs Compliant: Yes

Document 600035 Rev 04
practice, care should be taken to ensure that all
source impedances remain balanced. To accomplish
this, PCB traces carrying signal should be balanced
in length, connector resistance should be minimized,
and any input capacitance (including strays) should
be balanced between the + and - legs of the input
circuitry. Note that the additional contact resistance
of some sockets is sufficient to undo the effects of
precision trimming. Therefore, socketing the parts is
not recommended. THAT’s 1200-series InGenius®
input stages address many of these difficulties
through a patented method of increasing common-
mode input impedance.
the two resistor divider ratios are tightly controlled,
but the actual value of any individual resistor is not.
In fact, two of the four resistors are normally left
without trimming. The initial tolerance of the resis-
tors is quite wide, so it is possible for any given resis-
tor to vary over a surprisingly wide range, Lot-to-lot
variations of up to ±30 % are to be expected.
Input Considerations
against input overload via an unusual arrangement of
diodes connecting the + and - Input pins to the
power supply pins. The circuit of Figure 3 shows the
arrangement used for the R
applies to the other side. The zener diodes prevent
the protection network from conducting until an
input pin is raised at least 50 V above V
V
devices without constraining the allowable signal
swing at the input pins. The reference (and sense)
pins are protected via more conventional reverse-
biased diodes which will conduct if these pins are
raised above V
stages, their input pins are of necessity connected to
the outside world. This is likely to expose the parts
to ESD when cables are connected and disconnected.
Our testing indicates that the 1240-series devices will
typically withstand application of up to 1,000 volts
under the human body ESD model.
prevent RF from reaching the devices, THAT recom-
mends the circuit of Figure 4. C
be located close to the point where the input signal
comes into the chassis, preferably directly on the
connector. The unusual circuit design is intended to
minimize the unbalancing impact of differences in
the values of C
from each input to chassis ground to depend primar-
ily on the value of C
mately ten times less sensitive to mismatches
between C
approach, in which the junction of C
grounded directly. An excellent discussion of input
stage grounding can be found in the June 1995 issue
of the Journal of the Audio Engineering Society,
Vol. 43, No. 6, in articles by Stephen Macatee, Bill
Whitlock, and others.
internal resistor ratios, coupled with the uncertainty
EE
. Thus, the protection networks protect the
Therefore, to achieve this high CMRR in
A further consideration is that after trimming,
The 1240-series devices are internally protected
Because the 1240-series devices are input
To reduce risk of damage from ESD, and to
Note that, because of the tight matching of the
4
and C
CC
4
or below V
and C
5
3
. The circuit shown is approxi-
than the more conventional
5
Tel: [phone]; Fax: [phone]; Web: www.thatcorp.com
THAT Corporation; 45 Sumner Street; Milford, MA 01757-1656; USA
by forcing the capacitance
EE
3
.
/R
4
3
side; a similar one
through C
Copyright © 2008, THAT Corporation
4
CC
and C
or below
5
should
5
is
Page 4 of 8
in absolute value of any individual resistor, RF
bypassing through the addition of R-C networks at
the inputs (series resistor followed by a capacitor to
ground at each input) is not recommended.
added resistors can interact with the internal ones in
unexpected ways.
RF-bypass capacitor to work against is deemed
necessary, THAT recommends the use of a ferrite
bead or balun instead.
1240-series parts, the coupling capacitors should be
sized to present negligible impedance at any frequen-
cies of interest for common mode rejection. Regard-
less of the type of coupling capacitor chosen,
variations in the values of the two capacitors,
working against the 1240-series input impedance
(itself subject to potential imbalances in absolute
value, even when trimmed for perfect ratio match),
can unbalance common mode input signals, convert-
ing them to balanced signals which will not be
rejected by the CMRR of the devices. For this reason,
THAT recommends dc-coupling the inputs of the
1240-series devices.
Input Voltage Limitations
-6 dB gain, the 1243 and 1246 devices are capable of
accepting input signals above the power supply rails.
This is because the internal opamp’s inputs connect
to the outside world only through the on-chip resis-
tors R
Figure 2. Consider the following analysis.
Differential Input Signals
signal handling will be output clipping. The outputs
of all the devices typically clip at within 2V of the
supply rails. Therefore, maximum differential input
signal levels are directly related to the gain and
supply rails.
Common Mode Input Signals
output signal. The limitation on common-mode
handling is the point at which the inputs are
overloaded. So, we must consider the inputs of the
opamp.
mode input current splits to flow through both R
and through R
follow va, we will consider only the voltage at node a.
(R
Furthermore, the same constraints apply to v
the differential analysis.
3
+ R
If it is necessary to ac-couple the inputs of the
When configured, respectively, for -3 dB and
For differential signals (v
For common-mode input signals, there is no
For common mode signals (v
The voltage at a can be calculated as:
v
Again, solving for v
v
For the 1240, (R
a
IN(CM)
1
= v
4
through R
) / R
= v
IN(CM)
4
a
= 2.4. For the 1246, (R
3
R
R
/R
3
3
R
R
+R
+R
4
4
4
4
.
4
4
at nodes a and b as shown in
If some impedance
3
Because vb is constrained to
+ R
IN(CM)
4
,
) / R
Balanced Line Receiver ICs
IN(DIFF)
4
= 2. For the 1243,
in(CM)
), the limitation to
THAT 1240 Series
), the common
3
+ R
4
) / R
for the
a
as in
4
The
1
=3.
/R
2