A3995SEVTR-T Allegro Microsystems Inc, A3995SEVTR-T Datasheet - Page 9

IC, MOTOR DRIVER FULL BRIDGE 2.4A QFN-36

A3995SEVTR-T

Manufacturer Part Number
A3995SEVTR-T
Description
IC, MOTOR DRIVER FULL BRIDGE 2.4A QFN-36
Manufacturer
Allegro Microsystems Inc
Datasheet

Specifications of A3995SEVTR-T

Motor Type
Full Bridge
No. Of Outputs
2
Output Current
2.4A
Output Voltage
36V
Supply Voltage Range
3V To 5.5V
Driver Case Style
QFN
No. Of Pins
36
Applications
PWM Motor Driver
Number Of Outputs
2
Current - Output
2.4A
Voltage - Load
8 V ~ 36 V
Voltage - Supply
3 V ~ 5.5 V
Operating Temperature
-20°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
36-VFQFN Exposed Pad
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
620-1184-2
A3995
mit improvements in the per for mance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
nor for any in fringe ment of patents or other rights of third parties which may result from its use.
Copyright ©2006-2009, Allegro MicroSystems, Inc.
The products described here are manufactured under one or more U.S. patents or U.S. patents pending.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to per-
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
The in for ma tion in clud ed herein is believed to be ac cu rate and reliable. How ev er, Allegro MicroSystems, Inc. assumes no re spon si bil i ty for its use;
D
37X
0.55 ±0.20
0.08
0.25
C
+0.05
–0.07
1
2
2
1
EV Package, 36 Pin QFN with Exposed Thermal Pad
36
36
For the latest version of this document, visit our website:
A
6.00 ±0.15
0.50
DMOS Dual Full Bridge PWM Motor Driver
4.15
B
www.allegromicro.com
SEATING
PLANE
6.00 ±0.15
0.90 ±0.10
4.15
C
1.15
A Terminal #1 mark area
B
C Reference land pattern layout (reference IPC7351
D Coplanarity includes exposed thermal pad and terminals
All dimensions nominal, not for tooling use
(reference JEDEC MO-220VJJD-3, except pin count)
Dimensions in millimeters
Exact case and lead configuration at supplier discretion within limits shown
Exposed thermal pad (reference only, terminal #1
identifier appearance at supplier discretion)
QFN50P600X600X100-37V1M); All pads a minimum of 0.20 mm from
all adjacent pads; adjust as necessary to meet application process
requirements and PCB layout tolerances; when mounting on a
multilayer PCB, thermal vias at the exposed thermal pad land can
improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5)
1
2
0.30
36
115 Northeast Cutoff, Box 15036
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 (508) 853-
5000
www.allegromicro.com
4.15
5.80
0.50
4.15
5.80
9

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