MC74HC164ADR2G ON Semiconductor, MC74HC164ADR2G Datasheet

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MC74HC164ADR2G

Manufacturer Part Number
MC74HC164ADR2G
Description
IC, 8BIT SIPO SHIFT REGISTER, SOIC-14
Manufacturer
ON Semiconductor
Type
Not Requiredr
Datasheet

Specifications of MC74HC164ADR2G

Shift Register Function
Serial To Parallel
No. Of Elements
1
Ic Output Type
Standard
Logic Case Style
SOIC
No. Of Pins
14
Supply Voltage Range
2V To 6V
Logic Type
Shift Register
Technology
CMOS
Number Of Elements
1
Number Of Bits
8
Logic Family
HC
Logical Function
Shift Register
Operating Supply Voltage (typ)
2.5/3.3/5V
Output Type
Standard
Package Type
SOIC
Propagation Delay Time
260ns
Operating Temp Range
-55C to 125C
Operating Supply Voltage (min)
2V
Operating Supply Voltage (max)
6V
Operating Temperature Classification
Military
Mounting
Surface Mount
Pin Count
14
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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MC74HC164A
8−Bit Serial−Input/Parallel−
Output Shift Register
High−Performance Silicon−Gate CMOS
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
register. Two serial data inputs, A1 and A2, are provided so that one
input may be used as a data enable. Data is entered on each rising edge
of the clock. The active−low asynchronous Reset overrides the Clock
and Serial Data inputs.
Features
© Semiconductor Components Industries, LLC, 2006
October, 2006 − Rev. 4
The MC74HC164A is identical in pinout to the LS164. The device
The MC74HC164A is an 8−bit, serial−input to parallel−output shift
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 V to 6.0 V
Low Input Current: 1
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the JEDEC Standard No. 7A Requirements
Chip Complexity: 244 FETs or 61 Equivalent Gates
Pb−Free Packages are Available
m
A
1
14
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
14
14
14
1
(Note: Microdot may be in either location)
1
1
ORDERING INFORMATION
1
A
L, WL
Y, YY
W, WW
G or G
http://onsemi.com
CASE 948G
CASE 751A
SOEIAJ−14
DT SUFFIX
TSSOP−14
CASE 646
CASE 965
N SUFFIX
D SUFFIX
F SUFFIX
SOIC−14
PDIP−14
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
Publication Order Number:
14
1
14
1
14
1
14
MC74HC164AN
DIAGRAMS
MC74HC164A/D
AWLYYWWG
1
MARKING
74HC164A
AWLYWW
HC164AG
ALYWG
ALYWG
164A
HC
G

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MC74HC164ADR2G Summary of contents

Page 1

MC74HC164A 8−Bit Serial−Input/Parallel− Output Shift Register High−Performance Silicon−Gate CMOS The MC74HC164A is identical in pinout to the LS164. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The MC74HC164A is an ...

Page 2

... ORDERING INFORMATION Device MC74HC164AN MC74HC164ANG MC74HC164AD MC74HC164ADG MC74HC164ADR2 MC74HC164ADR2G MC74HC164ADTR2 MC74HC164ADTR2G MC74HC164AFEL MC74HC164AFELG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free. ...

Page 3

... Plastic DIP: – 10 mW/_C from 65_ to 125_C SOIC Package: – 7 mW/_C from 65_ to 125_C TSSOP Package: − 6.1 mW/_C from 65_ to 125_C For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D). RECOMMENDED OPERATING CONDITIONS Î Î Î Î ...

Page 4

... NOTES: 1. For propagation delays with loads other than 50 pF, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D). 2. Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D). ...

Page 5

... NOTE: Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D ...

Page 6

INPUTS A1, A2 (Pins 1, 2) Serial Data Inputs. Data at these inputs determine the data to be entered into the first stage of the shift register. For a high level to be entered into the shift register, both A1 ...

Page 7

CLOCK RESET CLOCK A1 A2 RESET EXPANDED LOGIC DIAGRAM Q D ...

Page 8

−T− SEATING PLANE 0.13 (0.005) PACKAGE DIMENSIONS PDIP−14 CASE 646−06 ISSUE http://onsemi.com 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI ...

Page 9

... G −T− SEATING 14 PL PLANE 0.25 (0.010 14X 0.58 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS SOIC−14 CASE 751A−03 ISSUE 0.25 (0.010 ...

Page 10

... S A −V− C 0.10 (0.004) −T− SEATING G D PLANE 14X 0.36 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS TSSOP−14 CASE 948G−01 ISSUE 0.25 (0.010) ...

Page 11

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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