CAT34C02YI-G CATALYST SEMICONDUCTOR, CAT34C02YI-G Datasheet - Page 2

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CAT34C02YI-G

Manufacturer Part Number
CAT34C02YI-G
Description
IC, EEPROM, 2KBIT, SERIAL 400KHZ TSSOP-8
Manufacturer
CATALYST SEMICONDUCTOR
Datasheet

Specifications of CAT34C02YI-G

Memory Size
2Kbit
Memory Configuration
2 BLK(256 X 8)
Ic Interface Type
I2C
Clock Frequency
400kHz
Supply Voltage Range
1.7V To 5.5V
Memory Case Style
TSSOP
No. Of Pins
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. The DC input voltage on any pin should not be lower than −0.5 V or higher than V
2. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100
3. Page Mode, V
4. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100
5. When not driven, the WP pin is pulled down to GND internally. For improved noise immunity, the internal pull−down is relatively strong;
Table 1. ABSOLUTE MAXIMUM RATINGS
Table 2. RELIABILITY CHARACTERISTICS
Table 3. D.C. OPERATING CHARACTERISTICS
Table 4. PIN IMPEDANCE CHARACTERISTICS
Operating Temperature
Storage Temperature
Voltage on Any Pin with Respect to Ground (Note 1)
Voltage on Pin A
N
I
C
undershoot to no less than −1.5 V or overshoot to no more than V
and JEDEC test methods.
and JEDEC test methods.
therefore the external driver must be able to supply the pull−down current when attempting to drive the input HIGH. To conserve power, as
the input level exceeds the trip point of the CMOS input buffer (~ 0.5 x V
WP
END
IN
Symbol
Symbol
Symbol
T
(Note 4)
(Note 5)
V
V
I
I
V
(Note 3)
CC
SB
I
DR
OL
L
IH
IL
CC
0
with Respect to Ground
Endurance
Data Retention
Supply Current
Standby Current
I/O Pin Leakage
Input Low Voltage
Input High Voltage
Output Low Voltage
SDA I/O Pin Capacitance
Other Input Pins
WP Input Current
= 5 V, 25°C
Parameter
Parameter
Parameter
Parameter
(Note 2)
(V
(V
I/O Pins at GND or V
I/O Pins at GND or V
http://onsemi.com
V
CC
CC
IN
V
V
= 1.7 V to 5.5 V, T
= 0 V, f = 1.0 MHz, V
= 1.7 V to 5.5 V, T
CC
CC
V
V
V
V
V
CC
CC
IN
IN
IN
< 3.6 V, f
> 3.6 V, f
Pin at GND or V
Test Conditions
2
CC
> 2.5 V, I
< 2.5 V, I
< V
< V
< V
Conditions
1,000,000
V
+ 1.5 V, for periods of less than 20 ns.
IH
IH
IH
IN
, V
, V
, V
Min
100
CC
> V
SCL
SCL
CC
CC
CC
OL
OL
), the strong pull−down reverts to a weak current source.
CC
CC
IH
= 100 kHz
= 400 kHz
= 5.5 V
= 3.6 V
= 1.7 V
A
= 3 mA
= 1 mA
A
, V
, V
= −40°C to +85°C, unless otherwise specified.)
CC
= −40°C to +85°C, unless otherwise specified.)
CC
CC
CC
CC
+ 0.5 V. During transitions, the voltage on any pin may
= 5.0 V
= 1.7 V
> 1.7 V
0.7 x V
−0.5 to +10.5
−0.5 to +6.5
−45 to +130
−65 to +150
−0.5
Min
Rating
Program/ Erase Cycles
CC
Max
130
120
80
8
6
2
0.3 x V
V
Units
Years
CC
Max
0.4
0.2
1
2
1
2
2
+ 0.5
CC
Units
Units
Unit
mA
°C
°C
mA
mA
pF
mA
V
V
V

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