SST39VF020-70-4C-WHE SILICON STORAGE TECHNOLOGY, SST39VF020-70-4C-WHE Datasheet - Page 8

• Manufacturer Part Number: SST39VF020-70-4C-WHE
• Description: 2M FLASH MEMORY, 4KB SECTOR, TSOP32
• Manufacturer: SILICON STORAGE TECHNOLOGY

Specifications of SST39VF020-70-4C-WHE

• Memory Size: 2Mbit
• Supply Voltage Range: 2.7V To 3.6V
• Memory Case Style: TSOP
• No. Of Pins: 32
• Svhc: No SVHC (18-Jun-2010)
• Access Time: 70ns
• Interface: X8 MPF
• Memory Configuration: 256K X 8bit
• Memory Type: Flash - NOR
• Operating Temperature Range: 0°C To +70°C
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Data Sheet
TABLE 5: DC O
TABLE 6: R
TABLE 7: C
TABLE 8: R
©2005 Silicon Storage Technology, Inc.
Symbol
I
I
I
I
V
V
V
V
V
Symbol
T
T
Parameter
C
C
Symbol
N
T
I
DD
SB
LI
LO
LTH
PU-READ
PU-WRITE
DR
IL
IH
IHC
OL
OH
I/O
IN
END
1. Typical conditions for the Active Current shown on the front data sheet page are average values at 25°C
2. Values are for 70 ns conditions. See the Multi-Purpose Flash Power Rating application note for further information.
3. 30 mA max for Erase operations in the industrial temperature range.
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
2. N
1
1
1
1
(room temperature), and V
higher minimum specification.
1,2
END
1
1
endurance rating is qualified as a 10,000 cycle minimum for the whole device. A sector- or block-level rating would result in a
Parameter
Power Supply Current
Read
Program and Erase
Standby V
Input Leakage Current
Output Leakage Current
Input Low Voltage
Input High Voltage
Input High Voltage (CMOS)
Output Low Voltage
Output High Voltage
V
Parameter
Power-up to Read Operation
Power-up to Program/Erase Operation
Description
I/O Pin Capacitance
Input Capacitance
Parameter
Endurance
Data Retention
Latch Up
DD
ECOMMENDED
APACITANCE (Ta = 25°C, f=1 Mhz, other pins open)
ELIABILITY
2
= 3.0-3.6V
PERATING
DD
Current
C
HARACTERISTICS
DD
3
C
S
FOR
= 3V for VF devices. Not 100% tested.
YSTEM
HARACTERISTICS
SST39LF512/010/020/040
SST39VF512 / SST39VF010 / SST39VF020 / SST39VF040
SST39LF512 / SST39LF010 / SST39LF020 / SST39LF040
P
OWER
512 Kbit / 1 Mbit / 2 Mbit / 4 Mbit Multi-Purpose Flash
V
V
0.7V
DD
DD
Min
-
UP
-0.3
-0.2
DD
T
Minimum Specification
IMINGS
Limits
Max
100 + I
0.8
0.2
20
30
15
10
8
1
10,000
100
AND
DD
2.7-3.6V
Units
mA
mA
µA
µA
µA
V
V
V
V
V
FOR
Test Conditions
Address input=V
V
CE#=V
CE#=WE#=V
CE#=V
V
V
V
V
V
I
I
OL
OH
Cycles
DD
IN
OUT
DD
DD
DD
Test Condition
Units
Years
=100 µA, V
SST39VF512/010/020/040
=GND to V
=-100 µA, V
mA
=V
=V
=V
=V
Minimum
=GND to V
V
V
I/O
DD
DD
DD
DD
IN
IL
IHC
100
100
, OE#=WE#=V
= 0V
= 0V
Max
Min
Max
Max
, V
DD
IL
DD
DD
JEDEC Standard A103
JEDEC Standard A117
, OE#=V
DD
=V
JEDEC Standard 78
DD
, V
ILT
=V
=V
DD
, V
/V
DD
DD
Test Method
DD
IHT
Max
DD
=V
Min
S71150-09-000
IH
IH
, at f=1/T
=V
Min
DD
, all I/Os open
Maximum
DD
Max
12 pF
Units
6 pF
Max
µs
µs
RC
1
T5.7 1150
T6.1 1150
T7.0 1150
T8.3 1150
Min
1/06