SST39VF800A-70-4C-EKE SILICON STORAGE TECHNOLOGY, SST39VF800A-70-4C-EKE Datasheet

SST39VF800A-70-4C-EKE

Manufacturer Part Number

SST39VF800A-70-4C-EKE

Description

8M FLASH MEMORY, 2KWORD SECTOR, SMD

Manufacturer

SILICON STORAGE TECHNOLOGY

Datasheet

1.SST39VF200A-70-4C-EKE.pdf (31 pages)

Specifications of SST39VF800A-70-4C-EKE

Memory Size

8Mbit

Supply Voltage Range

2.7V To 3.6V

Memory Case Style

TSOP

No. Of Pins

Svhc

No SVHC (18-Jun-2010)

Access Time

70ns

Interface

X16 MPF

Memory Configuration

512K X 16bit

Memory Type

Flash - NOR

Interface Type

CFI

Rohs Compliant

Yes

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

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Bonase Electronics (HK) Co., Limited

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SST39VF800A-70-4C-EKE

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SST

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BOSTOCK HK LIMITED

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SST39VF800A-70-4C-EKE

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SST

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BOSTOCK HK LIMITED

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SST39VF800A-70-4C-EKE

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SST

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BOSTOCK HK LIMITED

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SST39VF800A-70-4C-EKE

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SST

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BOSTOCK HK LIMITED

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SST39VF800A-70-4C-EKE

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SST/PBF

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BOSTOCK HK LIMITED

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Meier Automation Equipment Co., Limited

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SST

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H&T Electronics

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Meier Automation Equipment Co., Limited

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SST39VF800A-70-4C-EKE-T

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FEATURES:

• Organized as 128K x16 / 256K x16 / 512K x16

• Single Voltage Read and Write Operations

• Superior Reliability

• Low Power Consumption

• Sector-Erase Capability

• Block-Erase Capability

• Fast Read Access Time

• Latched Address and Data

PRODUCT DESCRIPTION

The SST39LF200A/400A/800A and SST39VF200A/400A/

800A devices are 128K x16 / 256K x16 / 512K x16 CMOS

Multi-Purpose Flash (MPF) manufactured with SST propri-

etary, high-performance CMOS SuperFlash technology.

The split-gate cell design and thick oxide tunneling injector

attain better reliability and manufacturability compared with

alternate approaches. The SST39LF200A/400A/800A

write (Program or Erase) with a 3.0-3.6V power supply.

The SST39VF200A/400A/800A write (Program or Erase)

with a 2.7-3.6V power supply. These devices conform to

JEDEC standard pinouts for x16 memories.

Featuring

SST39LF200A/400A/800A

800A devices provide a typical Word-Program time of 14

µsec. The devices use Toggle Bit or Data# Polling to detect

the completion of the Program or Erase operation. To pro-

tect against inadvertent write, they have on-chip hardware

and software data protection schemes. Designed, manu-

factured, and tested for a wide spectrum of applications,

these devices are offered with a guaranteed typical endur-

ance of 100,000 cycles. Data retention is rated at greater

than 100 years.

S71117-09-000

– 3.0-3.6V for SST39LF200A/400A/800A

– 2.7-3.6V for SST39VF200A/400A/800A

– Endurance: 100,000 Cycles (typical)

– Greater than 100 years Data Retention

(typical values at 14 MHz)

– Active Current: 9 mA (typical)

– Standby Current: 3 µA (typical)

– Uniform 2 KWord sectors

– Uniform 32 KWord blocks

– 45 and 55 ns for SST39LF200A

– 55 ns for SST39LF400A/800A

– 70 ns for SST39VF200A/400A/800A

2 Mbit / 4 Mbit / 8 Mbit (x16) Multi-Purpose Flash

high-performance

SST39LF/VF200A / 400A / 800A3.0 & 2.7V 2Mb / 4Mb / 8Mb (x16) MPF memories

SST39VF200A / SST39VF400A / SST39VF800A

SST39LF200A / SST39LF400A / SST39LF800A

2/07

and

Word-Program,

SST39VF200A/400A/

the

The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc.

• Fast Erase and Word-Program

• Automatic Write Timing

• End-of-Write Detection

• CMOS I/O Compatibility

• JEDEC Standard

• Packages Available

• All non-Pb (lead-free) devices are RoHS compliant

The SST39LF200A/400A/800A and SST39VF200A/400A/

800A devices are suited for applications that require con-

venient and economical updating of program, configura-

tion, or data memory. For all system applications, they

significantly improve performance and reliability, while low-

ering power consumption. They inherently use less energy

during Erase and Program than alternative flash technolo-

gies. When programming a flash device, the total energy

consumed is a function of the applied voltage, current, and

time of application. Since for any given voltage range, the

SuperFlash technology uses less current to program and

has a shorter erase time, the total energy consumed dur-

ing any Erase or Program operation is less than alternative

flash technologies. These devices also improve flexibility

while lowering the cost for program, data, and configura-

tion storage applications.

The SuperFlash technology provides fixed Erase and Pro-

gram times, independent of the number of Erase/Program

cycles that have occurred. Therefore the system software

or hardware does not have to be modified or de-rated as is

necessary with alternative flash technologies, whose

Erase and Program times increase with accumulated

Erase/Program cycles.

– Sector-Erase Time: 18 ms (typical)

– Block-Erase Time: 18 ms (typical)

– Chip-Erase Time: 70 ms (typical)

– Word-Program Time: 14 µs (typical)

– Chip Rewrite Time:

– Internal V

– Toggle Bit

– Data# Polling

– Flash EEPROM Pinouts and command sets

– 48-lead TSOP (12mm x 20mm)

– 48-ball TFBGA (6mm x 8mm)

– 48-ball WFBGA (4mm x 6mm)

– 48-bump XFLGA (4mm x 6mm) for 4M and 8M

2 seconds (typical) for SST39LF/VF200A

4 seconds (typical) for SST39LF/VF400A

8 seconds (typical) for SST39LF/VF800A

Generation

These specifications are subject to change without notice.

MPF is a trademark of Silicon Storage Technology, Inc.

Data Sheet

Related parts for SST39VF800A-70-4C-EKE

SST39VF800A-70-4C-EKE Summary of contents

Page 1

... Mbit / 4 Mbit / 8 Mbit (x16) Multi-Purpose Flash SST39LF200A / SST39LF400A / SST39LF800A SST39VF200A / SST39VF400A / SST39VF800A SST39LF/VF200A / 400A / 800A3.0 & 2.7V 2Mb / 4Mb / 8Mb (x16) MPF memories FEATURES: • Organized as 128K x16 / 256K x16 / 512K x16 • Single Voltage Read and Write Operations – 3.0-3.6V for SST39LF200A/400A/800A – ...

Page 2

... Any commands issued during the internal Program operation are ignored. ©2007 Silicon Storage Technology, Inc. 2 Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash SST39LF200A / SST39LF400A / SST39LF800A SST39VF200A / SST39VF400A / SST39VF800A Sector/Block-Erase Operation The Sector- (or Block-) Erase operation allows the system to erase the device on a sector-by-sector (or block-by- block) basis ...

Page 3

... Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash SST39LF200A / SST39LF400A / SST39LF800A SST39VF200A / SST39VF400A / SST39VF800A The actual completion of the nonvolatile write is asynchro- nous with the system; therefore, either a Data# Polling or Toggle Bit read may be simultaneous with the completion of the write cycle. If this occurs, the system may possibly get an erroneous result, i ...

Page 4

... FIGURE 1: Functional Block Diagram ©2007 Silicon Storage Technology, Inc. 2 Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash SST39LF200A / SST39LF400A / SST39LF800A SST39VF200A / SST39VF400A / SST39VF800A Product Identification Mode Exit/ CFI Mode Exit In order to return to the standard Read mode, the Software Product Identification mode must be exited. Exit is accom- plished by issuing the Software ID Exit command sequence, which returns the device to the Read mode ...

Page 5

... Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash SST39LF200A / SST39LF400A / SST39LF800A SST39VF200A / SST39VF400A / SST39VF800A SST39LF/VF800A SST39LF/VF400A SST39LF/VF200A A15 A15 A15 A14 A14 A14 A13 A13 A13 A12 A12 A12 A11 A11 A11 A10 A10 A10 WE# WE# WE A18 NC NC A17 A17 FIGURE 2: Pin Assignments for 48-Lead TSOP ...

Page 6

... Data Sheet CE CE FIGURE 4: Pin Assignments for 48-Ball WFBGA and 48-Bump XFLGA ©2007 Silicon Storage Technology, Inc. 2 Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash SST39LF200A / SST39LF400A / SST39LF800A SST39VF200A / SST39VF400A / SST39VF800A TOP VIEW (balls facing down) SST39VF200A WE DQ8 DQ10 DQ4 OE# DQ9 NC NC DQ5 SS DQ0 ...

Page 7

... Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash SST39LF200A / SST39LF400A / SST39LF800A SST39VF200A / SST39VF400A / SST39VF800A TABLE 2: Pin Description Symbol Pin Name Functions Address Inputs To provide memory addresses. During Sector-Erase sector. During Block-Erase A DQ -DQ Data Input/output To output data during Read cycles and receive input data during Write cycles. ...

Page 8

... Address for Alternate OEM extended Table (00H = none exits) 1AH 0000H 1. Refer to CFI publication 100 for more details. ©2007 Silicon Storage Technology, Inc. 2 Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash SST39LF200A / SST39LF400A / SST39LF800A SST39VF200A / SST39VF400A / SST39VF800A 2nd Bus 3rd Bus Write Cycle Write Cycle 1 2 ...

Page 9

... Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash SST39LF200A / SST39LF400A / SST39LF800A SST39VF200A / SST39VF400A / SST39VF800A TABLE 6: System Interface Information for SST39LF200A/400A/800A and SST39VF200A/400A/800A Address Data Data 1 1BH 0027H V Min (Program/Erase 0030H DQ -DQ : Volts 1CH 0036H V Max (Program/Erase -DQ : Volts 1DH 0000H V min (00H = 1EH 0000H V max (00H = no V ...

Page 10

... Bytes = 64 KByte/block (0100H = 256) ©2007 Silicon Storage Technology, Inc. 2 Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash SST39LF200A / SST39LF400A / SST39LF800A SST39VF200A / SST39VF400A / SST39VF800A N 19 Byte (13H = 19 512 KByte) N (00H = not supported Bytes (14H = 20 MByte) ...

Page 11

... Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash SST39LF200A / SST39LF400A / SST39LF800A SST39VF200A / SST39VF400A / SST39VF800A Absolute Maximum Stress Ratings (Applied conditions greater than those listed under “Absolute Maximum Stress Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these conditions or conditions greater than those defined in the operational sections of this data sheet is not implied ...

Page 12

... A sector- or block-level rating would result in a END higher minimum specification. ©2007 Silicon Storage Technology, Inc. 2 Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash SST39LF200A / SST39LF400A / SST39LF800A SST39VF200A / SST39VF400A / SST39VF800A Limits Min Max Units 30 ...

Page 13

... Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash SST39LF200A / SST39LF400A / SST39LF800A SST39VF200A / SST39VF400A / SST39VF800A AC CHARACTERISTICS TABLE 14: Read Cycle Timing Parameters V Symbol Parameter T Read Cycle Time RC T Chip Enable Access Time CE T Address Access Time AA T Output Enable Access Time CE# Low to Active Output CLZ 1 T OE# Low to Active Output ...

Page 14

... IDA T Sector-Erase SE T Block-Erase BE T Chip-Erase SCE 1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. ©2007 Silicon Storage Technology, Inc. 2 Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash SST39LF200A / SST39LF400A / SST39LF800A SST39VF200A / SST39VF400A / SST39VF800A Min ...

Page 15

... Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash SST39LF200A / SST39LF400A / SST39LF800A SST39VF200A / SST39VF400A / SST39VF800A ADDRESS A MS-0 CE# OE WE# HIGH-Z DQ 15-0 Note Most significant address for SST39LF/VF200A for SST39LF/VF400A and A 18 for SST39LF/VF800A FIGURE 5: Read Cycle Timing Diagram 5555 ADDRESS A MS WE# T WPH T AS OE# CE# DQ 15-0 ...

Page 16

... Most significant address for SST39LF/VF200A for SST39LF/VF400A and A 18 for SST39LF/VF800A FIGURE 8: Data# Polling Timing Diagram ©2007 Silicon Storage Technology, Inc. 2 Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash SST39LF200A / SST39LF400A / SST39LF800A SST39VF200A / SST39VF400A / SST39VF800A INTERNAL PROGRAM OPERATION STARTS 2AAA 5555 ADDR T CPH T DS ...

Page 17

... Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash SST39LF200A / SST39LF400A / SST39LF800A SST39VF200A / SST39VF400A / SST39VF800A ADDRESS A MS-0 CE# OE# WE Note Most significant address for SST39LF/VF200A for SST39LF/VF400A and A 18 for SST39LF/VF800A FIGURE 9: Toggle Bit Timing Diagram 5555 ADDRESS A MS-0 CE# OE WE# DQ 15-0 XXAA SW0 Note: This device also supports CE# controlled Chip-Erase operation. The WE# and CE# signals are interchageable as long as minimum timings are met ...

Page 18

... for SST39LF/VF200A for SST39LF/VF400A and A 18 for SST39LF/VF800A X can but no other value. FIGURE 12: WE# Controlled Sector-Erase Timing Diagram ©2007 Silicon Storage Technology, Inc. 2 Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash SST39LF200A / SST39LF400A / SST39LF800A SST39VF200A / SST39VF400A / SST39VF800A SIX-BYTE CODE FOR BLOCK-ERASE 2AAA 5555 5555 2AAA ...

Page 19

... Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash SST39LF200A / SST39LF400A / SST39LF800A SST39VF200A / SST39VF400A / SST39VF800A THREE-BYTE SEQUENCE FOR SOFTWARE ID ENTRY ADDRESS A 14-0 5555 2AAA CE# OE WE# DQ 15-0 XXAA SW0 Device ID = 2789H for SST39LF/VF200A, 2780H for SST39LF/VF400A and 2781H for SST39LF/VF800A Note: X can but no other value. ...

Page 20

... ADDRESS A 14-0 DQ 15-0 XXAA CE# OE WE# SW0 Note: X can but no other value. FIGURE 15: Software ID Exit/CFI Exit ©2007 Silicon Storage Technology, Inc. 2 Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash SST39LF200A / SST39LF400A / SST39LF800A SST39VF200A / SST39VF400A / SST39VF800A 5555 XX55 XXF0 T IDA T WHP SW1 SW2 20 1117 F10.1 S71117-09-000 2/07 ...

Page 21

... Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash SST39LF200A / SST39LF400A / SST39LF800A SST39VF200A / SST39VF400A / SST39VF800A V IHT INPUT? V ILT AC test inputs are driven at V (0.9 V IHT for inputs and outputs are V (0 FIGURE 16: AC Input/Output Reference Waveforms FIGURE 17: A Test Load Example ©2007 Silicon Storage Technology, Inc. ...

Page 22

... Data Sheet FIGURE 18: Word-Program Algorithm ©2007 Silicon Storage Technology, Inc. 2 Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash SST39LF200A / SST39LF400A / SST39LF800A SST39VF200A / SST39VF400A / SST39VF800A Start Load data: XXAAH Address: 5555H Load data: XX55H Address: 2AAAH Load data: XXA0H Address: 5555H Load Word Address/Word Data ...

Page 23

... Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash SST39LF200A / SST39LF400A / SST39LF800A SST39VF200A / SST39VF400A / SST39VF800A Internal Timer Program/Erase Initiated Wait SCE Program/Erase Completed FIGURE 19: Wait Options ©2007 Silicon Storage Technology, Inc. Toggle Bit Program/Erase Initiated Read word Read same No word No Does DQ 6 match? Yes Program/Erase ...

Page 24

... Address: 5555H Wait T IDA Read CFI data FIGURE 20: Software ID/CFI Command Flowcharts ©2007 Silicon Storage Technology, Inc. 2 Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash SST39LF200A / SST39LF400A / SST39LF800A SST39VF200A / SST39VF400A / SST39VF800A Software ID Entry Command Sequence Load data: XXAAH Load data: XXAAH Address: 5555H Address: 5555H ...

Page 25

... Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash SST39LF200A / SST39LF400A / SST39LF800A SST39VF200A / SST39VF400A / SST39VF800A Chip-Erase Command Sequence Load data: XXAAH Address: 5555H Load data: XX55H Address: 2AAAH Load data: XX80H Address: 5555H Load data: XXAAH Address: 5555H Load data: XX55H Address: 2AAAH Load data: XX10H ...

Page 26

... Data Sheet PRODUCT ORDERING INFORMATION SST 39 VF 200A - XXXX - XXX ©2007 Silicon Storage Technology, Inc. 2 Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash SST39LF200A / SST39LF400A / SST39LF800A SST39VF200A / SST39VF400A / SST39VF800A - 4C - B3K XXX X Environmental Attribute 1 E Package Modifier leads or balls balls or bumps (66 possible positions) Package Type B3 = TFBGA (0 ...

Page 27

... SST39LF800A-55-4C-B3K SST39LF800A-55-4C-EKE SST39LF800A-55-4C-B3KE Valid combinations for SST39VF800A SST39VF800A-70-4C-EK SST39VF800A-70-4C-B3K SST39VF800A-70-4C-EKE SST39VF800A-70-4C-B3KE SST39VF800A-70-4I-EK SST39VF800A-70-4I-B3K SST39VF800A-70-4I-EKE SST39VF800A-70-4I-B3KE Note: Valid combinations are those products in mass production or will be in mass production. Consult your SST sales representative to confirm availability of valid combinations and to determine availability of new combinations. ...

Page 28

... Maximum allowable mold flash is 0. the package ends, and 0.25 mm between leads. FIGURE 22: 48-Lead Thin Small Outline Package (TSOP) 12mm x 20mm SST Package Code: EK ©2007 Silicon Storage Technology, Inc. 2 Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash SST39LF200A / SST39LF400A / SST39LF800A SST39VF200A / SST39VF400A / SST39VF800A 18.50 18.30 20.20 19. ...

Page 29

... Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash SST39LF200A / SST39LF400A / SST39LF800A SST39VF200A / SST39VF400A / SST39VF800A TOP VIEW 8.00 ± 0. CORNER SIDE VIEW SEATING PLANE Note: 1. Complies with JEDEC Publication 95, MO-210, variant 'AB-1', although some dimensions may be more stringent. 2. All linear dimensions are in millimeters. 3. Coplanarity: 0. Ball opening size is 0.38 mm (± ...

Page 30

... No bump is present in position A1; a gold-colored indicator is present. FIGURE 25: 48-Bump Extremely-Thin-Profile, Fine-Pitch Land Grid Array (XFLGA) 4mm x 6mm SST Package Code: C1Q ©2007 Silicon Storage Technology, Inc. 2 Mbit / 4 Mbit / 8 Mbit Multi-Purpose Flash SST39LF200A / SST39LF400A / SST39LF800A SST39VF200A / SST39VF400A / SST39VF800A BOTTOM VIEW 5.00 4.00 ± 0.08 2.50 0.50 ...

Page 31

... Clarified the Test Conditions for Power Supply Current and Read parameters in Table 10 on page 12 • Part number changes - see page 27 for additional information • New Micro-Package part numbers added for SST39VF400A and SST39VF800A 06 • New Micro-Package part numbers added for SST39VF400A / 800A (see page 27) 07 • ...

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