AM29F040B-70EF Spansion Inc., AM29F040B-70EF Datasheet - Page 11

• Manufacturer Part Number: AM29F040B-70EF
• Description: IC, FLASH, 40MBIT, 70NS, TSOP-32
• Manufacturer: Spansion Inc.

Specifications of AM29F040B-70EF

• Memory Type: Flash
• Memory Size: 40Mbit
• Memory Configuration: 512K X 8
• Access Time: 70ns
• Supply Voltage Range: 4.5V To 5.5V
• Memory Case Style: TSOP
• No. Of Pins: 32
• Cell Type: NOR
• Density: 4Mb
• Access Time (max): 70ns
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 19b
• Operating Supply Voltage (typ): 5V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Program/erase Volt (typ): 4.5 to 5.5V
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Word Size: 8b
• Number Of Words: 512K
• Supply Current: 30mA
• Mounting: Surface Mount
• Pin Count: 32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Autoselect Mode
The autoselect mode provides manufacturer and de-
vice identification, and sector protection verification,
through identifier codes output on DQ7–DQ0. This
mode is primarily intended for programming equipment
to automatically match a device to be programmed with
its corresponding programming algorithm. However,
the autoselect codes can also be accessed in-system
through the command register.
When using programming equipment, the autoselect
mode requires V
A9. Address pins A6, A1, and A0 must be as shown in
Autoselect Codes (High Voltage Method) table. In addi-
tion, when verifying sector protection, the sector
Sector Protection/Unprotection
The hardware sector protection feature disables both
program and erase operations in any sector. The hard-
ware sector unprotection feature re-enables both
program and erase operations in previously protected
sectors.
Sector protection/unprotection must be implemented
using programming equipment. The procedure re-
quires a high voltage (V
control pins. Details on this method are provided in a
supplement, publication number 19957. Contact an
AMD representative to obtain a copy of the appropriate
document.
The device is shipped with all sectors unprotected.
AMD offers the option of programming and protecting
sectors at its factory prior to shipping the device
through AMD’s ExpressFlash™ Service. Contact an
AMD representative for details.
It is possible to determine whether a sector is protected
or unprotected. See
Hardware Data Protection
The command sequence requirement of unlock cycles
for programming or erasing provides data protection
against inadvertent writes (refer to the Command Defi-
nitions table). In addition, the following hardware data
protection measures prevent accidental erasure or pro-
November 11, 2009 21445E8
Manufacturer ID: AMD
Device ID: Am29F040B
Sector Protection
Verification
Description
ID
(11.5 V to 12.5 V) on address pin
“Autoselect Mode”
Table 3. Am29F040B Autoselect Codes (High Voltage Method)
ID
) on address pin A9 and the
A18–A16
Address
Sector
X
X
A15–A10
for details.
X
X
X
D A T A
V
V
V
A9
ID
ID
ID
Am29F040B
A8–A7
S H E E T
X
X
X
address must appear on the appropriate highest order
address bits. Refer to the corresponding Sector Ad-
dress Tables. The Command Definitions table shows
the remaining address bits that are don’t care. When all
necessary bits have been set as required, the program-
ming equipment may then read the corresponding
identifier code on DQ7–DQ0.
To access the autoselect codes in-system, the host
system can issue the autoselect command via the
command register, as shown in the Command Defini-
tions table. This method does not require V
“Command Definitions”
lect mode.
gramming, which might otherwise be caused by
spurious system level signals during V
power-down transitions, or from system noise.
Low V
When V
cept any write cycles. This protects data during V
power-up and power-down. The command register and
all internal program/erase circuits are disabled, and the
device resets. Subsequent writes are ignored until V
is greater than V
proper signals to the control pins to prevent uninten-
tional writes when V
Write Pulse “Glitch” Protection
Noise pulses of less than 5 ns (typical) on OE#, CE# or
WE# do not initiate a write cycle.
Logical Inhibit
Write cycles are inhibited by holding any one of OE# =
V
CE# and WE# must be a logical zero while OE# is a
logical one.
Power-Up Write Inhibit
If WE# = CE# = V
device does not accept commands on the rising edge
of WE#. The internal state machine is automatically
reset to reading array data on power-up.
IL
, CE# = V
V
V
V
A6
IL
IL
IL
CC
CC
A5–A2
Write Inhibit
X
X
X
is less than V
IH
or WE# = V
IL
V
A1
V
V
LKO
IH
IL
IL
and OE# = V
CC
. The system must provide the
is greater than V
for details on using the autose-
V
A0
V
V
IH
IL
IL
LKO
IH
, the device does not ac-
. To initiate a write cycle,
IH
Identifier Code on
00h (unprotected)
during power up, the
01h (protected)
DQ7-DQ0
CC
A4h
01h
LKO
power-up and
.
ID
. See
CC
CC
9