AM29F200BB-70SF Spansion Inc., AM29F200BB-70SF Datasheet - Page 3
![IC, FLASH, 2MBIT, 70NS, SOIC-44](/photos/19/5/190559/4243291_sml.jpg)
AM29F200BB-70SF
Manufacturer Part Number
AM29F200BB-70SF
Description
IC, FLASH, 2MBIT, 70NS, SOIC-44
Manufacturer
Spansion Inc.
Datasheets
1.AM29F200BT-90EI.pdf
(41 pages)
2.AM29F200BT-90EI.pdf
(41 pages)
3.AM29F200BT-90EI.pdf
(41 pages)
4.AM29F200BB-70SF.pdf
(42 pages)
Specifications of AM29F200BB-70SF
Memory Type
Flash
Memory Size
2Mbit
Memory Configuration
256K X 8 / 128K X 16
Access Time
70ns
Supply Voltage Range
4.5V To 5.5V
Memory Case Style
SOIC
No. Of Pins
44
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AM29F200BB-70SF
Manufacturer:
ST
Quantity:
12 000
Am29F200B
2 Megabit (256 K x 8-Bit/128 K x 16-Bit)
CMOS 5.0 Volt-only, Boot Sector Flash Memory
DISTINCTIVE CHARACTERISTICS
■ 5.0 V for read and write operations
■ Manufactured on 0.32 µm process technology
■ High performance
■ Low power consumption
■ Sector erase architecture
■ Top or bottom boot block configurations available
This Data Sheet states AMD’s current technical specifications regarding the Products described herein. This Data
Sheet may be revised by subsequent versions or modifications due to changes in technical specifications.
— Minimizes system level power requirements
— Compatible with 0.5 µm Am29F200A device
— Access times as fast as 45 ns
— 20 mA typical active read current (byte mode)
— 28 mA typical active read current for
— 30 mA typical program/erase current
— 1 µA typical standby current
— One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and
— One 8 Kword, two 4 Kword, one 16 Kword, and
— Supports full chip erase
— Sector Protection features:
(word mode)
three 64 Kbyte sectors (byte mode)
three 32 Kword sectors (word mode)
A hardware method of locking a sector to
prevent any program or erase operations within
that sector
Sectors can be locked via programming equipment
Temporary Sector Unprotect feature allows code
changes in previously locked sectors
■ Embedded Algorithms
■ Minimum 1,000,000 write/erase cycles guaranteed
■ 20-year data retention at 125°C
■ Package options
■ Compatible with JEDEC standards
■ Data# Polling and Toggle Bit
■ Ready/Busy# output (RY/BY#)
■ Erase Suspend/Erase Resume
■ Hardware RESET# pin
— Embedded Erase algorithm automatically
— Embedded Program algorithm automatically
— Reliable operation for the life of the system
— 44-pin SO
— 48-pin TSOP
— Known Good Die (KGD)
— Pinout and software compatible with
— Superior inadvertent write protection
— Detects program or erase cycle completion
— Hardware method for detection of program or
— Supports reading data from a sector not
— Resets internal state machine to the reading
preprograms and erases the entire chip or any
combination of designated sectors
writes and verifies data at specified addresses
(see publication number 21257)
single-power-supply flash
erase cycle completion
being erased
array data
Publication# 21526
Issue Date: June 14, 2004
Rev: D Amendment/1