AM29F800BT-55SF Spansion Inc., AM29F800BT-55SF Datasheet

AM29F800BT-55SF

Manufacturer Part Number

AM29F800BT-55SF

Description

IC, FLASH, 8MBIT, 55NS, SOIC-44

Manufacturer

Spansion Inc.

Datasheets

1.AM29F800BT-90SC.pdf (44 pages)

2.AM29F800BB-90EI.pdf (44 pages)

3.AM29F800BB-70EF.pdf (41 pages)

4.AM29F800BB-90EE.pdf (45 pages)

Specifications of AM29F800BT-55SF

Memory Type

Flash

Memory Size

8Mbit

Memory Configuration

1M X 8 / 512K X 16

Access Time

55ns

Supply Voltage Range

4.5V To 5.5V

Memory Case Style

SOIC

No. Of Pins

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Bonase Electronics (HK) Co., Limited

Part Number:

AM29F800BT-55SF

Manufacturer:

Spansion

Quantity:

1 000

Current page: 1 of 41
Download datasheet (228Kb)

Am29F800T/Am29F800B

8 Megabit (1,048,576 x 8-Bit/524,288 x 16-Bit) CMOS

5.0 Volt-only, Sector Erase Flash Memory

DISTINCTIVE CHARACTERISTICS

GENERAL DESCRIPTION

The Am29F800 is an 8 Mbit, 5.0 Volt-only Flash mem-

ory organized as 1 Mbyte of 8 bits each or 512K words

of 16 bits each. For flexible erase capability, the 8 Mbits

of data are divided into 19 sectors as follows: one 16

Kbyte, two 8 Kbyte, one 32 Kbyte, and fifteen 64 Kbyte.

Eight bits of data appear on DQ0–DQ7 in byte mode; in

word mode 16 bits appear on DQ0–DQ15. The

Am29F800 is offered in 44-pin SO and 48-pin TSOP

packages. This device is designed to be programmed

in-system with the standard system 5.0 Volt V

ply. A V

erase operations. The device can also be programmed

in standard EPROM programmers.

8/18/97

5.0 V

— Minimizes system level power requirements

Compatible with JEDEC standards

— Pinout and software compatible with

— Superior inadvertent write protection

Package options

— 44-pin SO

— 48-pin TSOP

Minimum 100,000 write/erase cycles guaranteed

High performance

— 70 ns maximum access time

Sector erase architecture

— One 16 Kbyte, two 8 Kbytes, one 32 Kbyte, and

— Any combination of sectors can be erased. Also

Sector protection

— Hardware method that disables any combination

Embedded Erase Algorithm

— Automatically pre-programs and erases the chip

single-power-supply flash

fifteen 64 Kbytes

supports full chip erase.

of sectors from write or erase operations.

Implemented using standard PROM

programming equipment.

or any sector

PRELIMINARY

10% for read and write operations

of 12.0 volts is not required for program or

sup-

The standard Am29F800 offers access times of 70 ns, 90

ns, 120 ns, and 150 ns, allowing high-speed micropro-

cessors to operate without wait states. To eliminate bus

contention, the device has separate chip enable (CE),

write enable (WE), and output enable (OE) controls.

The Am29F800 is entirely command set compatible

with the JEDEC single-power-supply Flash standard.

Commands are written to the command register using

standard microprocessor write timings. Register con-

tents serve as input to an internal state-machine which

controls the erase and program circuitry. Write cycles

also internally latch addresses and data needed for the

programming and erase operations. Reading data out

Embedded Program Algorithm

— Automatically programs and verifies data at

Data Polling and Toggle Bit feature for detection

of program or erase cycle completion

Ready/Busy output (RY/BY)

— Hardware method for detection of program or

Erase Suspend/Resume

— Supports reading data from or programming

Low power consumption

— 20 mA typical active read current for Byte Mode

— 28 mA typical active read current for Word Mode

— 30 mA typical program/erase current

Enhanced power management for standby

mode

— 1 A typical standby current

Boot Code Sector Architecture

— T = Top sector

— B = Bottom sector

Hardware RESET pin

— Resets internal state machine to the read mode

specified address

erase cycle completion

data to a sector not being erased

Publication# 20375

Issue Date: August 1997

Rev: C Amendment/+1

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