PIC16LF1827-I/P Microchip Technology, PIC16LF1827-I/P Datasheet - Page 116
PIC16LF1827-I/P
Manufacturer Part Number
PIC16LF1827-I/P
Description
IC, 8BIT MCU, PIC16LF, 32MHZ, DIP-18
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Specifications of PIC16LF1827-I/P
Controller Family/series
PIC16LF
Eeprom Memory Size
256Byte
Ram Memory Size
384Byte
Cpu Speed
32MHz
No. Of Timers
5
Interface
EUSART, I2C, SPI
Core Size
8 Bit
Program Memory Size
4kWords
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
18-DIP (0.300", 7.62mm)
Processor Series
PIC16LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
32 KHz
Number Of Programmable I/os
16
Number Of Timers
5
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
On-chip Dac
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16LF1827-I/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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PIC16F/LF1826/27
11.4
When modifying existing data in a program memory
row, and data within that row must be preserved, it must
first be read and saved in a RAM image. Program
memory is modified using the following steps:
1.
2.
3.
4.
5.
6.
7.
8.
TABLE 11-2:
EXAMPLE 11-3:
DS41391C-page 116
* This code block will read 1 word of program memory at the memory address:
*
*
Load the starting address of the row to be mod-
ified.
Read the existing data from the row into a RAM
image.
Modify the RAM image to contain the new data
to be written into program memory.
Load the starting address of the row to be rewrit-
ten.
Erase the program memory row.
Load the write latches with data from the RAM
image.
Initiate a programming operation.
Repeat steps 6 and 7 as many times as required
to reprogram the erased row.
PROG_ADDR_LO (must be 00h-08h) data will be returned in the variables;
PROG_DATA_HI, PROG_DATA_LO
BANKSEL
MOVLW
MOVWF
CLRF
BSF
BCF
BSF
NOP
NOP
BSF
MOVF
MOVWF
MOVF
MOVWF
Modifying Flash Program Memory
8000h-8003h
8007h-8008h
Address
8006h
EEADRL
PROG_ADDR_LO
EEADRL
EEADRH
EECON1,CFGS
INTCON,GIE
EECON1,RD
INTCON,GIE
EEDATL,W
PROG_DATA_LO
EEDATH,W
PROG_DATA_HI
USER ID, DEVICE ID AND CONFIGURATION WORD ACCESS (CFGS = 1)
CONFIGURATION WORD AND DEVICE ID ACCESS
Configuration Words 1 and 2
Device ID/Revision ID
; Select correct Bank
;
; Store LSB of address
; Clear MSB of address
; Select Configuration Space
; Disable interrupts
; Initiate read
; Executed (See Figure 11-1)
; Ignored (See Figure 11-1)
; Restore interrupts
; Get LSB of word
; Store in user location
; Get MSB of word
; Store in user location
Function
User IDs
Preliminary
11.5
Instead of accessing program memory or EEPROM
data memory, the User ID’s, Device ID/Revision ID and
Configuration Words can be accessed when CFGS = 1
in the EECON1 register. This is the region that would
be pointed to by PC<15> = 1, but not all addresses are
accessible. Different access may exist for reads and
writes. Refer to Table 11-2.
When read access is initiated on an address outside
the parameters listed in Table 11-2, the EEDATH:EED-
ATL register pair is cleared.
Read Access
User ID, Device ID and
Configuration Word Access
Yes
Yes
Yes
2010 Microchip Technology Inc.
Write Access
Yes
No
No
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