PIC18F452I/L Microchip Technology, PIC18F452I/L Datasheet - Page 120
PIC18F452I/L
Manufacturer Part Number
PIC18F452I/L
Description
IC, 8BIT MCU, PIC18F, 40MHZ, LCC-44
Manufacturer
Microchip Technology
Datasheet
1.PIC18F242-ISO.pdf
(332 pages)
Specifications of PIC18F452I/L
Controller Family/series
PIC18
No. Of I/o's
34
Eeprom Memory Size
256Byte
Ram Memory Size
1.5KB
Cpu Speed
40MHz
No. Of Timers
4
Core Size
8 Bit
Program Memory Size
16 KWords
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC18FXX2
14.1
Capture/Compare/PWM Register 1 (CCPR1) is com-
prised of two 8-bit registers: CCPR1L (low byte) and
CCPR1H (high byte). The CCP1CON register controls
the operation of CCP1. All are readable and writable.
TABLE 14-1:
TABLE 14-2:
DS39564C-page 118
CCPx Mode CCPy Mode
Compare
Capture
Capture
PWM
PWM
PWM
CCP Mode
Compare
Capture
CCP1 Module
PWM
Compare
Compare
Compare
Capture
Capture
CCP MODE - TIMER
RESOURCE
INTERACTION OF TWO CCP MODULES
PWM
TMR1 or TMR3 time-base. Time-base can be different for each CCP.
The compare could be configured for the special event trigger,
which clears either TMR1 or TMR3 depending upon which time-base is used.
The compare(s) could be configured for the special event trigger,
which clears TMR1 or TMR3 depending upon which time-base is used.
The PWMs will have the same frequency and update rate
(TMR2 interrupt).
None
None
Timer Resource
Timer1 or Timer3
Timer1 or Timer3
Timer2
14.2
Capture/Compare/PWM Register2 (CCPR2) is com-
prised of two 8-bit registers: CCPR2L (low byte) and
CCPR2H (high byte). The CCP2CON register controls
the operation of CCP2. All are readable and writable.
Interaction
CCP2 Module
© 2006 Microchip Technology Inc.
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