PIC24FJ64GB004-I/ML Microchip Technology, PIC24FJ64GB004-I/ML Datasheet - Page 36

IC, 16BIT MCU, PIC24F, 32MHZ, QFN-44

PIC24FJ64GB004-I/ML

Manufacturer Part Number
PIC24FJ64GB004-I/ML
Description
IC, 16BIT MCU, PIC24F, 32MHZ, QFN-44
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr

Specifications of PIC24FJ64GB004-I/ML

Controller Family/series
PIC24
Ram Memory Size
8KB
Cpu Speed
32MHz
No. Of Timers
5
Interface
I2C, LIN, SPI, UART, USB
No. Of Pwm Channels
5
Core Size
16 Bit
Program Memory Size
64 KB
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Embedded Interface Type
I2C, LIN, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24FJ64GB004-I/ML
Manufacturer:
MICROCHIP
Quantity:
1 200
PIC24FJ64GA1/GB0
5.2.6
The READC command instructs the programming
executive to read N or Device ID registers, starting from
the 24-bit address specified by Addr_MSB and
Addr_LS. This command can only be used to read 8-bit
or 16-bit data.
When this command is used to read Device ID
registers, the upper byte in every data word returned by
the programming executive is 00h and the lower byte
contains the Device ID register value.
Expected Response (4 + 3 * (N – 1)/2 words for N odd):
DS39934B-page 36
15
Opcode
Length
N
Addr_MSB
Addr_LS
Note:
Opcode
Field
1100h
2 + N
Device ID Register 1
...
Device ID Register N
12 11
READC COMMAND
Reading unimplemented memory will
cause the programming executive to
reset. Please ensure that only memory
locations present on a particular device
are accessed.
N
1h
3h
Number of 8-bit Device ID registers to
read (max. of 256)
MSB of 24-bit source address
Least Significant 16 bits of 24-bit
source address
Addr_LS
8 7
Description
Length
Addr_MSB
0
5.2.7
The READP command instructs the programming
executive to read N 24-bit words of code memory,
including Configuration Words, starting from the 24-bit
address specified by Addr_MSB and Addr_LS. This
command can only be used to read 24-bit data. All data
returned in response to this command uses the packed
data format described in Section 5.2.2 “Packed Data
Format”.
Expected Response (2 + 3 * N/2 words for N even):
Expected Response (4 + 3 * (N – 1)/2 words for N odd):
15
Opcode
Length
N
Reserved
Addr_MSB
Addr_LS
Note:
Opcode
1200h
2 + 3 * N/2
Least significant program memory word 1
...
Least significant data word N
1200h
4 + 3 * (N – 1)/2
Least significant program memory word 1
...
MSB of program memory word N (zero padded)
Field
Reserved
12 11
READP COMMAND
Reading unimplemented memory will
cause the programming executive to
reset. Please ensure that only memory
locations present on a particular device
are accessed.
2h
4h
Number of 24-bit instructions to read
(max. of 32768)
0h
MSB of 24-bit source address
Least Significant 16 bits of 24-bit
source address
Addr_LS
© 2009 Microchip Technology Inc.
8 7
N
Description
Length
Addr_MSB
0

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