PIC24HJ256GP206A-I/PT Microchip Technology, PIC24HJ256GP206A-I/PT Datasheet - Page 211

IC, 16BIT MCU, PIC24H, 40MIPS, TQFP-64

PIC24HJ256GP206A-I/PT

Manufacturer Part Number
PIC24HJ256GP206A-I/PT
Description
IC, 16BIT MCU, PIC24H, 40MIPS, TQFP-64
Manufacturer
Microchip Technology
Series
PIC® 24Hr

Specifications of PIC24HJ256GP206A-I/PT

Controller Family/series
PIC24
Ram Memory Size
16KB
Cpu Speed
40MIPS
No. Of Timers
9
Interface
I2C, LIN, SPI, UART
No. Of Pwm Channels
8
Core Size
16 Bit
Program Memory Size
256 KB
Core Processor
PIC
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 18x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Embedded Interface Type
I2C, LIN, SPI, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24HJ256GP206A-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Company:
Part Number:
PIC24HJ256GP206A-I/PT
Quantity:
4 800
REGISTER 20-1:
 2009 Microchip Technology Inc.
bit 3
bit 2
bit 1
bit 0
SIMSAM: Simultaneous Sample Select bit (only applicable when CHPS<1:0> = 01 or 1x)
When AD12B = 1, SIMSAM is: U-0, Unimplemented, Read as ‘0’
1 = Samples CH0, CH1, CH2, CH3 simultaneously (when CHPS<1:0> = 1x); or
0 = Samples multiple channels individually in sequence
ASAM: ADC Sample Auto-Start bit
1 = Sampling begins immediately after last conversion. SAMP bit is auto-set
0 = Sampling begins when SAMP bit is set
SAMP: ADC Sample Enable bit
1 = ADC sample/hold amplifiers are sampling
0 = ADC sample/hold amplifiers are holding
If ASAM = 0, software may write ‘1’ to begin sampling. Automatically set by hardware if ASAM = 1.
If SSRC = 000, software may write ‘0’ to end sampling and start conversion. If SSRC 000,
automatically cleared by hardware to end sampling and start conversion.
DONE: ADC Conversion Status bit
1 = ADC conversion cycle is completed.
0 = ADC conversion not started or in progress
Automatically set by hardware when analog-to-digital conversion is complete. Software may write ‘0’
to clear DONE status (software not allowed to write ‘1’). Clearing this bit will NOT affect any operation
in progress. Automatically cleared by hardware at start of a new conversion.
Samples CH0 and CH1 simultaneously (when CHPS<1:0> = 01)
ADxCON1: ADCx CONTROL REGISTER 1(where x = 1 or 2) (CONTINUED)
PIC24HJXXXGPX06A/X08A/X10A
Preliminary
DS70592B-page 211

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