PIC14000-04I/SS Microchip Technology, PIC14000-04I/SS Datasheet - Page 21
![IC, 8BIT MCU, PIC14, 4MHZ, SSOP-28](/photos/18/99/189938/3833516_sml.gif)
PIC14000-04I/SS
Manufacturer Part Number
PIC14000-04I/SS
Description
IC, 8BIT MCU, PIC14, 4MHZ, SSOP-28
Manufacturer
Microchip Technology
Datasheet
1.PIC14000-04SO.pdf
(153 pages)
Specifications of PIC14000-04I/SS
Controller Family/series
PIC14
No. Of I/o's
22
Ram Memory Size
192Byte
Cpu Speed
4MHz
No. Of Timers
2
Interface
I2C
Digital Ic Case Style
SSOP
Core Size
8 Bit
Program Memory Size
4096 X 14
Embedded Interface Type
I2C
Rohs Compliant
Yes
Processor Series
PIC14000
Core
PIC
Data Bus Width
8 bit
Program Memory Type
EPROM
Data Ram Size
192 B
Interface Type
SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
22
Number Of Timers
1
Operating Supply Voltage
2.7 V to 6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SSOP-28
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
14 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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4.2.2.5
This register contains the individual flag bits for the
Peripheral interrupts (Figure 4-7).
FIGURE 4-7:
bit7
1996 Microchip Technology Inc.
CMIF
R/W
PIR1 REGISTER
—
R
—
PIR1 REGISTER
R
PBIF I
R/W
2
R/W
CIF
RCIF
R/W
ADCIF
R/W
Preliminary
OVFIF
R/W
bit0
Unimplemented. Read as ‘0’
CMIF: Programmable Reference Comparator Interrupt Flag
1 = The comparator output has tripped. This is a
0 = The interrupt did not occur
ADCIF: A/D Capture Interrupt Flag
1 = An A/D capture has occurred.
0 = An A/D capture has not occurred
RCIF:
1 = At least one RC<7:4> input changed.
0 =None of the RC<7:4> inputs have changed
I
1 = A transmission/reception is completed.
0 =Waiting to transmit/receive
PBIF:
1 = The external pushbutton interrupt has occurred
0 =The external pushbutton interrupt did not occur
Unimplemented. Read as ‘0’
OVFIF: A/D counter Overflow Interrupt Flag
1 = An A/D counter overflow has occurred.
0 = An A/D counter overflow has not occurred
2
Note:
CIF:
Register:
Address:
POR value: 00h
level-sensitive interrupt.
Must be cleared in software.
Must be cleared in software.
Must be cleared in software.
Must be cleared in software.
on OSC1/PBTN. Note: This interrupt is not available
in HS mode.
PORTC Interrupt on Change Flag
I
External Pushbutton Interrupt Flag
2
C
These bits will be set by the specified
condition, even if the corresponding
Interrupt Enable bit is cleared (interrupt
disabled) or the GIE bit is cleared (all
interrupts disabled). Before enabling an
interrupt, the user may wish to clear the
corresponding interrupt flag, to ensure that
the program does not immediately branch
to the Peripheral Interrupt service routine.
Port Interrupt Flag
PIR1
0Ch
W: Writable
R:
U:
Readable
Unimplemented,
read as ‘0’
PIC14000
DS40122B-page 21
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