LM20333MH National Semiconductor, LM20333MH Datasheet - Page 12

BUCK REG, 3A, ADJ, POWERWISE, 20TSSOP

LM20333MH

Manufacturer Part Number
LM20333MH
Description
BUCK REG, 3A, ADJ, POWERWISE, 20TSSOP
Manufacturer
National Semiconductor
Datasheet

Specifications of LM20333MH

Primary Input Voltage
36V
No. Of Outputs
1
Output Voltage
32V
Output Current
3A
Voltage Regulator Case Style
TSSOP
No. Of Pins
20
Operating Temperature Range
-40°C To +125°C
Svhc
No SVHC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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the output ripple less than 1% of the rated output voltage.
Keep in mind ceramic capacitors are sometimes preferred
because they have very low ESR; however, depending on
package and voltage rating of the capacitor the value of the
capacitance can drop significantly with applied voltage. The
output capacitor selection will also affect the output voltage
droop during a load transient. The peak droop on the output
voltage during a load transient is dependent on many factors;
however, an approximation of the transient droop ignoring
loop bandwidth can be obtained using the following equation:
where, C
L (H) is the value of the inductor, V
voltage drop ignoring loop bandwidth considerations, ΔI
STEP
capacitor ESR, V
the set regulator output voltage. Both the tolerance and volt-
age coefficient of the capacitor should be examined when
designing for a specific output ripple or transient droop target.
INPUT CAPACITOR SELECTION
Good quality input capacitors are necessary to limit the ripple
voltage at the VIN pin while supplying most of the switch cur-
rent during the on-time. In general it is recommended to use
a ceramic capacitor for the input as they provide both a low
impedance and small footprint. One important note is to use
a good dielectric for the ceramic capacitor such as X5R or
X7R. These provide better over temperature performance
and also minimize the DC voltage derating that occurs on Y5V
capacitors. The input capacitors C
placed as close as possible to the VIN and GND pins on both
sides of the device.
Non-ceramic input capacitors should be selected for RMS
current rating and minimum ripple voltage. A good approxi-
mation for the required ripple current rating is given by the
relationship:
As indicated by the RMS ripple current equation, highest re-
quirement for RMS current rating occurs at 50% duty cycle.
For this case, the RMS ripple current rating of the input ca-
pacitor should be greater than half the output current. For best
performance, low ESR ceramic capacitors should be placed
in parallel with higher capacitance capacitors to provide the
best input filtering for the device.
SETTING THE OUTPUT VOLTAGE (R
The resistors R
voltage for the device. provides suggestions for R
R
FB2
(A) is the load step change, R
for common output voltages.
OUT
(F) is the minimum required output capacitance,
FB1
IN
and R
(V) is the input voltage, and V
FB2
are selected to set the output
IN1
DROOP
ESR
FB1
and C
, R
(Ω) is the output
(V) is the output
FB2
IN2
)
should be
OUT
FB1
(V) is
OUT-
and
12
If different output voltages are required, R
lected to be between 4.99 kΩ to 49.9 kΩ and R
calculated using the equation below.
LOOP COMPENSATION (R
The purpose of loop compensation is to meet static and dy-
namic performance requirements while maintaining adequate
stability. Optimal loop compensation depends on the output
capacitor, inductor, load and the device itself. Table 2 below
gives values for the compensation network that will result in
a stable system when using a 150 µF, 6.3V POSCAP output
capacitor (6TPB150MAZB).
If the desired solution differs from the table above the loop
transfer function should be analyzed to optimize the loop
compensation. The overall loop transfer function is the prod-
uct of the power stage and the feedback network transfer
functions. For stability purposes, the objective is to have a
loop gain slope that is -20dB/decade from a very low frequen-
cy to beyond the crossover frequency. Figure 3 shows the
transfer functions for power stage, feedback/compensation
network, and the resulting compensated loop for the
LM20333.
TABLE 1. Suggested Values for R
TABLE 2. Recommended Compensation for
V
12
12
12
12
12
12
5
5
5
5
5
IN
C
OUT
R
FB1
= 150 µF, I
short
4.99
8.87
12.7
21.5
31.6
52.3
V
3.3
2.5
1.5
1.2
0.8
3.3
2.5
1.5
1.2
0.8
OUT
5
(kΩ)
R
L (µH)
OUT
FB2
open
6.8
5.6
4.7
3.3
2.2
1.5
2.2
3.3
2.2
1.5
10.2
10.2
10.2
10.2
C1
2
10
10
(kΩ)
, C
= 3A, f
C1
)
R
C
30.9
33.2
40.2
22.1
18.2
8.45
38.3
38.3
30.1
18.2
SW
13
(kΩ) C
V
0.8
1.2
1.5
1.8
2.5
3.3
5.0
= 500kHz
OUT
FB1
FB2
and R
should be se-
C1
4.7
3.3
2.2
2.2
2.2
3.3
2.2
2.2
2.2
2.2
2.2
FB1
(nF)
FB2
can be

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