XC9221C095MR Torex Semiconductor Ltd, XC9221C095MR Datasheet - Page 8

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XC9221C095MR

Manufacturer Part Number
XC9221C095MR
Description
DC/DC STEP DOWN, ADJ 16V, 500KHZ
Manufacturer
Torex Semiconductor Ltd
Datasheet

Specifications of XC9221C095MR

Primary Input Voltage
16V
No. Of Outputs
1
Output Voltage
12V
Output Current
3A
Voltage Regulator Case Style
SOT-25
No. Of Pins
5
Operating Temperature Range
-40°C To +85°C
Svhc
No SVHC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Part Number:
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8/21
■OPERATIONAL EXPLANATION (Continued)
<Protection Circuits>
2. Short-Circuit Protection Circuit (Latching Type)
1. Integral Protection Circuit (Latch Type)
XC9220/9221
In the circuit of the XC9220/9221 A and B series, the more load current becomes larger, the duty of the EXT/ pin
gradually expands, and the duty reaches maximum (EXT/L). When the MAXDUTY state continues a certain amount
of time (T
resuming the operation from the latching state, please turn off the IC via the CE pin or apply the input voltage again
(operates U.V.L.O. function and release). The latching state does not mean a complete shutdown, but a state in
which pulse output is suspended; therefore, the internal circuitry remains in operation.
However, the integral protection circuit uses the MAXDUTY as a trigger for its operation, it suspends the pulse output
no matter what dropout voltage decreases. For the specification including small dropout voltage, the XC9220/9221
C or D series, which do not have the integral protection function, are recommended.
When the FB pin is shorted to the Ground or the output voltage drops rapidly because of over load state etc., the P-ch
driver transistor is kept OFF as in the case with the integral protection circuit. (The protection circuit operates when
the FB voltage becomes 0.7V or lower.) For releasing the latching state, the circuit is needed to restart via the V
and the CE pin.
EXT/ Waveform
Integral protection circuit
Short-circuit protection circuit
FB Voltage
VREF
PRO
), the EXT/ pin holds high level (latching) and keeps the P-ch output driver transistor in OFF state. For
* Protection circuit does not operate.
Sof t-start time :Tss x 90%
Series
Ton < Tpro
* A bout 100 to 200usec delay time is set
to avoid latching w hen instantaneous
transient response drop
Ton > Tpro
Less than 100usec = Not latching
Protection circuit operates and
EXT/ Output shut dow n
Latch
Ton : ON Time ( EXT/ : L)
Tpro : Integral Protection Circuit
100 usec
Delay Time (Internally set)
Latch
0.9V
0.7V
0.9V
IN

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