SI9185DMP-12-T1-E3 Vishay, SI9185DMP-12-T1-E3 Datasheet - Page 11

• Manufacturer Part Number: SI9185DMP-12-T1-E3
• Description: IC, LDO VOLT REG, 1.215V, 0.5A, MLP33-8
• Manufacturer: Vishay

Specifications of SI9185DMP-12-T1-E3

• Primary Input Voltage: 6V
• Output Voltage Fixed: 1.215V
• Dropout Voltage Vdo: 170mV
• No. Of Pins: 8
• Output Current: 500mA
• Operating Temperature Range: -40°C To +85°C
• Termination Type: SMD
• Number Of Outputs: 1
• Polarity: Positive
• Input Voltage Max: 6 V
• Output Voltage: 1.215 V
• Output Type: Fixed
• Dropout Voltage (max): 0.25 V at 200 mA
• Line Regulation: 0.18 % / V
• Load Regulation: 30 mV
• Voltage Regulation Accuracy: 1.5 %
• Maximum Power Dissipation: 2.5 W
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: MLP33-8
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SENSE or ADJ
SENSE is used to sense the output voltage. Connect SENSE
to V
version, use a resistor divider R1 and R2, connect R1 from
V
25-kW to 150-kW range for low power consumption, while
maintaining adequate noise immunity.
The formula below calculates the value of R1, given the
desired output voltage and the R2 value,
SHUTDOWN (SD)
SD controls the turning on and off of the Si9185. V
guaranteed to be on when the SD pin voltage equals or is
greater than 1.5 V. V
pin voltage equals or is less than 0.4 V. During shutdown
mode, the Si9185 will draw less than 2-mA current from the
source. To automatically turn on V
applied, tie the SD pin to V
ERROR
ERROR is an open drain output that goes low when V
less than 5% of its normal value. As with any open drain output,
an external pull up resistor is needed. When a capacitor is
connected from DELAY to GROUND, the error signal transition
from low to high is delayed (see Delay section). This delayed
error signal can be used as the power-on reset signal for the
application system. (Refer to Figure 4.)
The ERROR pin is disconnected if not used.
DELAY
A capacitor from DELAY to GROUND sets the time delay for
ERROR going from low to high state. The time delay can be
calculated using the following formula:
The DELAY pin should be an open circuit if not used.
C
For low noise application, connect a high frequency ceramic
capacitor from C
or X7R is recommended.
Document Number: 71765
S-51147—Rev. F, 20-Jun-05
OUT
NOISE
OUT
R1 +
T
V
delay
ADJ
to ADJ and R2 from ADJ to ground. R2 should be in the
for the fixed voltage version. For the adjustable output
is nominally 1.215 V.
+
V
OUT
V
ADJ
* V
V
I
delay
NOISE
ADJ
C
ADJ
delay
OUT
to ground. A 0.01-mF or a 0.1-mF X5R
R2
is guaranteed to be off when theSD
IN
.
OUT
whenever the input is
(1)
(2)
OUT
OUT
is
is
Safe Operating Area
The ability of the Si9185 to supply current is ultimately
dependent on the junction temperature of the pass device.
Junction temperature is in turn dependent on power
dissipation in the pass device, the thermal resistance of the
package and the circuit board, and the ambient temperature.
The power dissipation is defined as
Junction temperature is defined as
To calculate the limits of performance, these equations must
be rewritten.
Allowable power dissipation is calculated using the equation
While allowable output current is calculated using the equation
Ratings of the Si9185 that must be observed are
T
= 4 _C/W.
The value of Rθ
value of Rθ
approximately 46 _C/W.
Figure 6 shows the performance limits graphically for the
Si9185 mounted on the circuit board used for thermal
characterization.
Jmax
0.6
0.5
0.4
0.3
0.2
0.1
0.0
= 125 _C, T
P
T
P
I
OUT
J
D
D
0
= T
= (V
= (T
CA
= (T
A
for the board used in device characterization is
(V
J
IN
+ ((P
CA
1
− T
J
IN
– V
Amax
− T
− V
A
is dependent on the PC board used. The
D
OUT
A
OUT
)/ (Rθ
* (Rθ
)/ (Rθ
= 85 _C, (V
2
)
) * I
MAX
V
JC
IN
JC
Figure 6.
OUT
JC
= 5.3 V
− V
+ Rθ
+ Rθ
3
+ Rθ
OUT
.
Vishay Siliconix
IN
CA
CA
(V)
CA
– V
)
)).
4
) * (V
OUT
)
IN
max
5
– V
Si9185
= 5.3 V, Rθ
www.vishay.com
OUT
T
T
T
T
T
A
A
A
A
A
= 0_C
= 25_C
= 50_C
= 70_C
= 85_C
6
).
JC
11