ADL5321ARKZ Analog Devices Inc, ADL5321ARKZ Datasheet - Page 10

• Manufacturer Part Number: ADL5321ARKZ
• Description: AMP, DVR, RF, 2.3HZ-4GHZ, 3SOT89
• Manufacturer: Analog Devices Inc

Specifications of ADL5321ARKZ

• Frequency Range: 2.3GHz To 4GHz
• Noise Figure Typ: 4.9dB
• Power Dissipation Pd: 520mW
• Supply Current: 90mA
• Supply Voltage Range: 4.5V To 5.5V
• Rf Ic Case Style: SOT-89
• No.: RoHS Compliant
• Gain: 14dB
• Rf Type: Broadband

ADL5321
BASIC LAYOUT CONNECTIONS
The basic connections for operating the ADL5321 are shown in
Figure 20.
Table 5 lists the required matching components. Capacitors
C1, C2, C3, C4, and C7 are Murata GRM155 series (0402 size)
and Inductor L1 is a Coilcraft 0603CS series (0603 size). For all
frequency bands, the placement of C3 and C7 is critical. From
2500 MHz to 2700 MHz, the placement of C1 is also important.
Table 6 lists the recommended component placement for
various frequencies.
A 5 V dc bias is supplied through L1 that is connected to RFOUT
(Pin 3). In addition to C4, 10 nF and 10 μF power supply
decoupling capacitors are also required. The typical current
consumption for the ADL5321 is 90 mA.
Table 5. Recommended Components for Basic Connections
Frequency (MHz)
2500 to 2700
3400 to 3850
Table 6. Matching Component Spacing
Frequency (MHz)
2500 to 2700
3400 to 3850
RF
IN
1
2
SEE TABLE 5 FOR FREQUENCY SPECIFIC COMPONENTS.
SEE TABLE 6 FOR RECOMMENDED COMPONENT SPACING.
C1
1
λ
C7
1
2
1
1
Figure 20. Basic Connections
ADL5321
(2)
2
3
GND
λ
2
2
VCC
C4
L1
C6 10µF
C5 10nF
λ
C1 (pF)
1.0
10
1
1
3
2
C3
λ
4
1
2
C2
λ1 (mils)
1
240
90
C2 (pF)
10
10
RF
OUT
Rev. B | Page 10 of 16
SOLDERING INFORMATION AND RECOMMENDED
PCB LAND PATTERN
Figure 21 shows the recommended land pattern for the ADL5321.
To minimize thermal impedance, the exposed paddle on the
SOT-89 package underside is soldered down to a ground plane
along with (GND) Pin 2. If multiple ground layers exist, they
should be stitched together using vias. For more information on
land pattern design and layout, refer to the AN-772 application
note, A Design and Manufacturing Guide for the Lead Frame
Chip Scale Package (LFCSP).
C3 (pF)
1.2
1.2
λ2 (mils)
75
35
5.56mm
Figure 21. Recommended Land Pattern
0.86mm
C4 (pF)
10
10
0.20mm
λ3 (mils)
89
40
1.50mm
3.00mm
1.80mm
C7 (pF)
Open
1.0
3.48mm
λ4 (mils)
325
416
0.62mm
1.27mm
L1 (nH)
9.5
9.5