LT5575EUF#PBF Linear Technology, LT5575EUF#PBF Datasheet - Page 9

• Manufacturer Part Number: LT5575EUF#PBF
• Description: IQ QUADRATURE DEMODULATOR, QFN-16
• Manufacturer: Linear Technology

Specifications of LT5575EUF#PBF

• Frequency Range: 0.8GHz To 2.7GHz
• Rf Type: Quadrature
• Supply Voltage Range: 4.5V To 5.25V
• Rf Ic Case Style: QFN
• No. Of Pins: 16
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIN FUNCTIONS
BLOCK DIAGRAM
GND (Pins 1, 3, 4, 9, 11): Ground pin.
RF (Pin 2): RF Input Pin. This is a single-ended 50Ω ter-
minated input. No external matching network is required
for the high frequency band. An external series capacitor
(and/or shunt capacitor) may be required for impedance
transformation to 50Ω in the low frequency band from
800MHz to 1.5GHz (see Figure 4). If the RF source is not
DC blocked, a series blocking capacitor should be used.
Otherwise, damage to the IC may result.
V
should be decoupled using 1000pF and 0.1µF capacitors.
EN (Pin 5): Enable Pin. When the input voltage is higher
than 2.0V, the circuit is completely turned on. When the
enable pin voltage is less than 1.0V, the circuit is turned
off. Under no conditions should the voltage at the EN
pin exceed V
result. If the Enable function is not needed, then the EN
pin should be tied to V
CC
(Pins 6, 7, 8, 12): Power Supply Pins. These pins
CC
+ 0.3V. Otherwise, damage to the IC may
CC
.
GND
RF
2
3
V
6
CC
V
7
CC
V
CC
8
RF AMP
RF AMP
1
V
12
CC
GND
4
LO BUFFERS
Q-MIXER
I-MIXER
9
LO (Pin 10): Local Oscillator Input Pin. This is a single-
ended 50Ω terminated input. No external matching net-
work is required in the high frequency band. An external
shunt capacitor (and/or series capacitor) may be required
for impedance transformation to 50Ω for the low frequency
band from 800MHz to 1.5GHz (see Figure 6). If the LO
source is not DC blocked, a series blocking capacitor must
be used. Otherwise, damage to the IC may result.
Q
Output Pins of the Q Channel. The internal DC bias voltage
is V
I
Output Pins of the I Channel. The internal DC bias voltage
is V
Exposed Pad (Pin 17): Ground Return for the Entire IC.
This pin must be soldered to the printed circuit board
ground plane.
OUT
OUT
CC
CC
BIAS
–
EN
–
5
, I
, Q
0°/90°
– 1.1V for each pin.
– 1.1V for each pin.
OUT
OUT
+
+
EXPOSED
(Pins 15, 16): Differential Baseband
(Pins 13, 14): Differential Baseband
LPF
LPF
PAD
17
5575 BD
16
15
11
10
14
13
I
I
GND
LO
Q
Q
OUT
OUT
OUT
OUT
+
–
+
–
LT5575
9
5575f