NRF24L01G NORDIC SEMICONDUCTOR, NRF24L01G Datasheet - Page 65

• Manufacturer Part Number: NRF24L01G
• Description: IC, RF TRANSCEIVER, 2.4-2.4835GHZ QFN-20
• Manufacturer: NORDIC SEMICONDUCTOR

Specifications of NRF24L01G

• Transmitting Current: 11.3mA
• Data Rate: 2Mbps
• Frequency Range: 2.4GHz To 2.4835GHz
• Modulation Type: GFSK
• Sensitivity Dbm: -82dBm
• Rf Ic Case Style: QFN
• No. Of Pins: 20
• Sensitivity (dbm): -82dBm
• Supply Voltage Range: 1.9V To 3.6V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

nRF24L01 Product Specification
Enhanced ShockBurst™ Transmitting Payload
Enhanced ShockBurst™ Receive Payload
Revision 2.0
Appendix A - Enhanced ShockBurst™ - Configuration and Communi-
cation Example
1.
2.
3.
4.
5.
6.
7.
1.
2.
3.
4.
The configuration bit PRIM_RX has to be low.
When the application MCU has data to transmit, the address for the receiving node (TX_ADDR)
A high pulse on CE starts the transmission. The minimum pulse width on CE is 10µs.
nRF24L01 ShockBurst™:
If auto acknowledgement is activated (ENAA_P0=1) the radio goes into RX mode immediately,
nRF24L01 goes into standby-I mode if CE is low. Otherwise next payload in TX FIFO is transmit-
If nRF24L01 is in standby-II mode, it goes to standby-I mode immediately if CE is set low.
RX is selected by setting the PRIM_RX bit in the CONFIG register to high. All data pipes that
Active RX mode is started by setting CE high.
After 130µs nRF24L01 is monitoring the air for incoming communication.
When a valid packet has been received (matching address and correct CRC), the payload is
and payload data (TX_PLD) has to be clocked into nRF24L01 through the SPI. The width of TX-
payload is counted from number of bytes written into the TX FIFO from the MCU. TX_PLD must
be written continuously while holding CSN low. TX_ADDR does not have to be rewritten if it is
unchanged from last transmit. If the PTX device shall receive acknowledge, data pipe 0 has to be
configured to receive the ACK packet. The RX address for data pipe 0 (RX_ADDR_P0) has to be
equal to the TX address (TX_ADDR) in the PTX device. For the example in
the following address settings have to be performed for the TX5 device and the RX device:
TX5 device: TX_ADDR = 0xB3B4B5B605
TX5 device: RX_ADDR_P0 = 0xB3B4B5B605
RX device: RX_ADDR_P5 = 0xB3B4B5B605
unless the NO_ACK bit is set in the received packet. If a valid packet has been received in the
valid acknowledgement time window, the transmission is considered a success. The TX_DS bit in
the STATUS register is set high and the payload is removed from TX FIFO. If a valid ACK packet
is not received in the specified time window, the payload is retransmitted (if auto retransmit is
enabled). If the auto retransmit counter (ARC_CNT) exceeds the programmed maximum limit
(ARC), the MAX_RT bit in the STATUS register is set high. The payload in TX FIFO is NOT
removed. The IRQ pin is active when MAX_RT or TX_DS is high. To turn off the IRQ pin, the inter-
rupt source must be reset by writing to the STATUS register (see Interrupt chapter). If no ACK
packet is received for a packet after the maximum number of retransmits, no further packets can
be transmitted before the MAX_RT interrupt is cleared. The packet loss counter (PLOS_CNT) is
incremented at each MAX_RT interrupt. That is, ARC_CNT counts the number of retransmits that
was required to get a single packet through. PLOS_CNT counts the number of packets that did not
get through after maximum number of retransmits.
ted. If TX FIFO is empty and CE is still high, nRF24L01 enters standby-II mode.
receive data must be enabled (EN_RXADDR register), auto acknowledgement for all pipes running
Enhanced ShockBurst™ has to be enabled (EN_AA register), and the correct payload widths
must be set (RX_PW_Px registers). Addresses have to be set up as described in item 2 in the
Enhanced ShockBurst™ transmit payload chapter above.
stored in the RX-FIFO, and the RX_DR bit in STATUS register is set high. The IRQ pin is active
Radio is powered up.
16MHz internal clock is started.
RF packet is completed (see the packet description).
Data is transmitted at high speed (1Mbps or 2Mbps configured by MCU).
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Figure 12. on page 37