ADUM1250ARZ Analog Devices Inc, ADUM1250ARZ Datasheet - Page 4

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ADUM1250ARZ

Manufacturer Part Number
ADUM1250ARZ
Description
IC,Digital Coupler,HYBRID,SOP,8PIN,PLASTIC
Manufacturer
Analog Devices Inc
Series
iCoupler®r
Datasheet

Specifications of ADUM1250ARZ

Inputs - Side 1/side 2
2/2
Number Of Channels
4
Isolation Rating
2500Vrms
Voltage - Supply
3 V ~ 5.5 V
Data Rate
1Mbps
Propagation Delay
150ns
Output Type
Open Drain
Package / Case
8-SOIC (3.9mm Width)
Operating Temperature
-40°C ~ 105°C
Rohs Compliant
Yes
No. Of Channels
2
Supply Voltage Range
3V To 5.5V
Digital Ic Case Style
SOIC
No. Of Pins
8
Operating Temperature Range
-40°C To +105°C
Leaded Process Compatible
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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ADuM1250/ADuM1251
AC Specifications
All minimum/maximum specifications apply over the entire recommended operating range, unless otherwise noted. All typical specifications
are at T
Table 2.
Parameter
MAXIMUM FREQUENCY
OUTPUT FALL TIME
PROPAGATION DELAY
PULSE WIDTH DISTORTION
COMMON-MODE TRANSIENT IMMUNITY
1
2
3
4
5
6
All voltages are relative to their respective ground.
t
t
t
t
CM
that can be sustained while maintaining V
magnitude is the range over which the common mode is slewed.
PLH12
PHL12
PLH21
PHL21
5 V Operation
3 V Operation
5 V Operation
3 V Operation
5 V Operation
3 V Operation
H
Side 1 Output (0.9 V
Side 2 Output (0.9 V
Side 1 Output (0.9 V
Side 2 Output (0.9 V
Side 1-to-Side 2, Rising Edge
Side 1-to-Side 2, Falling Edge
Side 2-to-Side 1, Rising Edge
Side 2-to-Side 1, Falling Edge
Side 1-to-Side 2, Rising Edge
Side 1-to-Side 2, Falling Edge
Side 2-to-Side 1, Rising Edge
Side 2-to-Side 1, Falling Edge
Side 1-to-Side 2, |t
Side 2-to-Side 1, |t
Side 1-to-Side 2, |t
Side 2-to-Side 1, |t
is the maximum common-mode voltage slew rate that can be sustained while maintaining V
propagation delay is measured from the Side 1 input logic threshold to an output value of 0.7 V
propagation delay is measured from the Side 1 input logic threshold to an output value of 0.4 V.
propagation delay is measured from the Side 2 input logic threshold to an output value of 0.7 V
propagation delay is measured from the Side 2 input logic threshold to an output value of 0.9 V.
A
= 25°C, V
DD1
1
= 3.3 V or 5 V, and V
PLH12
PLH21
PLH12
PLH21
DD1
DD2
DD1
DD2
− t
− t
− t
− t
to 0.9 V)
to 0.1 V
to 0.9 V)
to 0.1 V
PHL12
PHL21
PHL12
PHL21
2
4
2
4
3
5
3
5
|
|
|
|
DD2
DD2
O
< 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient
)
)
6
DD2
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
PWD
PWD
PWD
PWD
|CM
f1
f2
f1
f2
PLH12
PHL12
PLH21
PHL21
PLH12
PHL12
PLH21
PHL21
= 3.3 V or 5 V, unless otherwise noted. Refer to Figure 5.
H
|, |CM
12
21
12
21
L
|
1000
Min
13
32
13
32
25
Rev. C | Page 4 of 12
Typ
26
52
32
61
95
162
31
85
82
196
32
110
67
54
114
77
35
Max
120
120
120
120
130
275
70
155
125
340
75
210
145
85
215
135
O
> 0.8 V
DD2
DD1
Unit
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
kV/μs
.
.
DD2
. CM
Test Conditions
4.5 V ≤ V
R1 = 1.6 kΩ, C
3.0 V ≤ V
R1 = 1.0 kΩ, C
4.5 ≤ V
C
3.0 V ≤ V
R1 = 1.0 kΩ, R2 = 120 Ω
4.5 V ≤ V
R1 = 1.6 kΩ, R2 = 180 Ω
3.0 V ≤ V
R1 = 1.0 kΩ, R2 = 120 Ω
L
L1
is the maximum common-mode voltage slew rate
= C
DD1
L2
DD1
DD1
DD1
DD1
DD1
= 0 pF, R1 = 1.6 kΩ, R2 = 180 Ω
, V
, V
, V
, V
, V
, V
DD2
DD2
DD2
DD2
DD2
DD2
L2
L2
≤ 5.5 V,
= 400 pF, R2 = 180 Ω
= 400 pF, R2 = 120 Ω
≤ 5.5 V, C
≤ 3.6 V, C
≤ 3.6 V, C
≤ 5.5 V, C
≤ 3.6 V, C
L1
L1
L1
L1
L1
= 40 pF,
= 40 pF,
= C
= C
= C
L2
L2
L2
= 0 pF,
= 0 pF,
= 0 pF,

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