AD9764ARZ Analog Devices Inc, AD9764ARZ Datasheet - Page 9

• Manufacturer Part Number: AD9764ARZ
• Description: IC,D/A CONVERTER,SINGLE,14-BIT,CMOS,SOP,28PIN
• Manufacturer: Analog Devices Inc
• Series: TxDAC®r

Specifications of AD9764ARZ

• Rohs Compliant: YES
• Settling Time: 35ns
• Number Of Bits: 14
• Number Of Converters: 1
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 170mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9764-EB - BOARD EVAL FOR AD9764
• Data Interface: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

FUNCTIONAL DESCRIPTION
Figure 21 shows a simplified block diagram of the AD9764. The
AD9764 consists of a large PMOS current source array that is
capable of providing up to 20 mA of total current. The array
is divided into 31 equal currents that make up the five most
significant bits (MSBs). The next four bits or middle bits consist
of 15 equal current sources whose value is 1/16th of an MSB
current source. The remaining LSBs are binary weighted frac-
tions of the middle bits current sources. Implementing the
middle and lower bits with current sources, instead of an R-2R
ladder, enhances its dynamic performance for multitone or low
amplitude signals and helps maintain the DAC’s high output
impedance (i.e., >100 k ).
All of these current sources are switched to one or the other of
the two output nodes (i.e., I
tial current switches. The switches are based on a new architec-
ture that drastically improves distortion performance. This new
switch architecture reduces various timing errors and provides
matching complementary drive signals to the inputs of the dif-
ferential current switches.
The analog and digital sections of the AD9764 have separate
power supply inputs (i.e., AVDD and DVDD) that can operate
independently over a 2.7 volt to 5.5 volt range. The digital
section, which is capable of operating up to a 125 MSPS clock
rate, consists of edge-triggered latches and segment decoding
logic circuitry. The analog section includes the PMOS current
sources, the associated differential switches, a 1.20 V bandgap
voltage reference and a reference control amplifier.
The full-scale output current is regulated by the reference con-
trol amplifier and can be set from 2 mA to 20 mA via an exter-
nal resistor, R
both the reference control amplifier and voltage reference
V
the segmented current sources with the proper scaling factor.
The full-scale current, I
DAC TRANSFER FUNCTION
The AD9764 provides complementary current outputs, I
and I
I
I
current output appearing at I
both the input code and I
REV. B
OUTFS
OUTB
REFIO
I
OUTB
OUTA
, the complementary output, provides no current. The
, sets the reference current I
, when all bits are high (i.e., DAC CODE = 16383) while
. I
= (DAC CODE/16384) I
OUTA
SET
0.1 F
. The external resistor, in combination with
will provide a near full-scale current output,
CLOCK
OUTFS
V
REFIO
R
2k
OUTFS
SET
OUTA
, is 32 times the value of I
OUTA
and can be expressed as:
+5V
I
REF
or I
REF
and I
OUTB
OUTFS
, which is mirrored over to
CLOCK
REFIO
FS ADJ
DVDD
DCOM
OUTB
SLEEP
+1.20V REF
) via PMOS differen-
is a function of
REFLO
Figure 21. Functional Block Diagram
SEGMENTED SWITCHES
FOR DB13–DB5
DIGITAL DATA INPUTS (DB13–DB0)
REF
.
50pF
OUTA
(1)
COMP1
LATCHES
CURRENT SOURCE
0.1 F
–9–
ARRAY
PMOS
where DAC CODE = 0 to 16383 (i.e., Decimal Representation).
As mentioned previously, I
current I
V
where I
The two current outputs will typically drive a resistive load
directly or via a transformer. If dc coupling is required, I
and I
loads, R
that R
I
50
at the I
Note that the full-scale value of V
exceed the specified output compliance range to maintain speci-
fied distortion and linearity performance.
The differential voltage, V
I
Substituting the values of I
expressed as:
These last two equations highlight some of the advantages of
operating the AD9764 differentially. First, the differential op-
eration will help cancel common-mode error sources associated
with I
Second, the differential code-dependent current and subsequent
voltage, V
output (i.e., V
power to the load.
Note that the gain drift temperature performance for a single-
ended (V
AD9764 can be enhanced by selecting temperature tracking
resistors for R
ship as shown in Equation 8.
+5V
OUTA
OUTB
REFIO
AVDD
SWITCHES
V
V
OUTA
OUTB
I
I
V
V
V
LSB
OUTB
OUTFS
OUTB
or 75
OUTA
DIFF
DIFF
DIFF
LOAD
or I
is:
OUTA
and external resistor R
REF
LOAD
= I
= I
REF
OUTA
OUTB
DIFF
AD9764
= (16383 – DAC CODE)/16384
should be directly connected to matching resistive
= (I
= {(2 DAC CODE – 16383)/16384}
=
= V
= 32
and I
may represent the equivalent load resistance seen by
ACOM
OUTA
OUTB
, which is nominally set by a reference voltage
, that are tied to analog common, ACOM. Note
and I
{(32 R
cable. The single-ended voltage output appearing
, is twice the value of the single-ended voltage
LOAD
OUTA
COMP2
OUTA
and V
REFIO
as would be the case in a doubly terminated
I
I
OUTA
OUTB
OUTB
OUTB
I
R
R
and R
REF
LOAD
– I
or V
/R
OUTB
LOAD
LOAD
0.1 F
such as noise, distortion and dc offsets.
SET
I
OUTB
OUTB
nodes is simply:
/R
OUTB
SET
) or differential output (V
DIFF
SET
OUTFS
)
OUTA
I
OUTA
), thus providing twice the signal
due to their ratiometric relation-
)
SET
, appearing across I
R
V
DIFF
, I
LOAD
V
R
50
V
. It can be expressed as:
is a function of the reference
OUTB
LOAD
OUTA
OUTB
REFIO
= V
OUTA
and V
and I
– V
V
R
50
OUTA
LOAD
OUTB
REF
OUTB
I
OUTFS
; V
AD9764
OUTA
DIFF
should not
DIFF
) of the
and
can be
OUTA
(2)
(3)
(4)
(5)
(6)
(7)
(8)