CS43L43-KZZ Cirrus Logic Inc, CS43L43-KZZ Datasheet - Page 7

• Manufacturer Part Number: CS43L43-KZZ
• Description: IC,D/A CONVERTER,DUAL,16/18/20/24-BIT,TSSOP,16PIN
• Manufacturer: Cirrus Logic Inc

Specifications of CS43L43-KZZ

• Rohs Compliant: YES

3.3 Digital Interface Format
The device will accept audio samples in 1 of 4 digital interface formats in Stand-Alone mode, as illustrated
in Table 5, and 1 of 7 formats in Control Port mode, as illustrated in Table 14.
DS479PP3
512, 256, 128
512, 256, 128
MCLK/LRCK
3.2.1 Internal Serial Clock Mode
The device will enter the Internal Serial Clock Mode if no low to high transitions are detected on the
SCLK pin for 2 consecutive periods of LRCK. In this mode, the SCLK is internally derived and syn-
chronous with MCLK and LRCK. The SCLK/LRCK ratio is either 32, 48, or 64 depending upon the
MCLK/LRCK ratio and the Digital Interface Format selection (see Table 4).
The internal serial clock is utilized when de-emphasis control is required. Operation in the Internal
Serial Clock mode is identical to operation with an external SCLK synchronized with LRCK; how-
ever, External SCLK mode is the recommended system clocking application.
3.2.2 External Serial Clock Mode
The device will enter the External Serial Clock Mode whenever 16 low to high transitions are detect-
ed on the SCLK pin during any phase of the LRCK period. The device will revert to Internal Serial
Clock Mode if no low to high transitions are detected on the SCLK pin for 2 consecutive periods of
LRCK.
3.3.1 Stand-Alone Mode
The desired format is selected via the DIF0 and DIF1 pins. For an illustration of the required rela-
tionship between the LRCK, SCLK and SDATA, see Figures 2-4.
384, 192
Ratio
Input
I
DIF1
2
S up to 24
0
0
1
1
Bits
X
X
DIF0
0
1
0
1
Table 5. Digital Interface Format - Stand-Alone Mode
I
Left Justified, up to 24-bit data
Right Justified, 24-bit Data
Right Justified, 16-bit Data
2
S, up to 24-bit data
I
2
Bits
S 16
Table 4. Internal SCLK/LRCK Ratio
X
Digital Interface Format Selection
DESCRIPTION
Left Justified 24
Bits
X
X
24, 20, or 18 Bits
Right Justified
FORMAT
X
X
0
1
2
3
FIGURE
Right Justified
2
3
4
4
16 Bits
X
X
CS43L43
SCLK/LRCK
Internal
Ratio
32
48
64
7